From 2e143da2fbd92d9c3ae2d7a315efca5c6af24e69 Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Thu, 24 Apr 2025 15:51:29 +0800 Subject: hw/arm/aspeed_ast27x0 Introduce vbootrom memory region MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce a new vbootrom memory region. The region is mapped at address "0x00000000" and has a size of 128KB, identical to the SRAM region size. This memory region is intended for loading a vbootrom image file as part of the boot process. The vbootrom registered in the SoC's address space using the ASPEED_DEV_VBOOTROM index. Signed-off-by: Jamin Lin Reviewed-by: Nabih Estefan Tested-by: Nabih Estefan Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- include/hw/arm/aspeed_soc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/hw/arm/aspeed_soc.h') diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index c1e80c8908..4dcb1010dc 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -59,6 +59,7 @@ struct AspeedSoCState { MemoryRegion sram; MemoryRegion spi_boot_container; MemoryRegion spi_boot; + MemoryRegion vbootrom; AddressSpace dram_as; AspeedRtcState rtc; AspeedTimerCtrlState timerctrl; @@ -169,6 +170,7 @@ struct AspeedSoCClass { const char *aspeed_soc_cpu_type(AspeedSoCClass *sc); enum { + ASPEED_DEV_VBOOTROM, ASPEED_DEV_SPI_BOOT, ASPEED_DEV_IOMEM, ASPEED_DEV_UART0, -- cgit 1.4.1