From 3471ae96b10bc0a1efeeeff85aea7a823cb57f77 Mon Sep 17 00:00:00 2001 From: Luc Michel Date: Fri, 26 Sep 2025 09:07:19 +0200 Subject: hw/arm/xlnx-versal: split the xlnx-versal type MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Split the xlnx-versal device into two classes, a base, abstract class and the existing concrete one. Introduce a VersalVersion type that will be used across several device models when versal2 implementation is added. This is in preparation for versal2 implementation. Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Edgar E. Iglesias Tested-by: Philippe Mathieu-Daudé Message-id: 20250926070806.292065-2-luc.michel@amd.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'include/hw/arm/xlnx-versal.h') diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 05ed641b6b..1f92e314d6 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -2,6 +2,7 @@ * Model of the Xilinx Versal * * Copyright (c) 2018 Xilinx Inc. + * Copyright (c) 2025 Advanced Micro Devices, Inc. * Written by Edgar E. Iglesias * * This program is free software; you can redistribute it and/or modify @@ -35,9 +36,12 @@ #include "hw/misc/xlnx-versal-cfu.h" #include "hw/misc/xlnx-versal-cframe-reg.h" #include "target/arm/cpu.h" +#include "hw/arm/xlnx-versal-version.h" + +#define TYPE_XLNX_VERSAL_BASE "xlnx-versal-base" +OBJECT_DECLARE_TYPE(Versal, VersalClass, XLNX_VERSAL_BASE) #define TYPE_XLNX_VERSAL "xlnx-versal" -OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) #define XLNX_VERSAL_NR_ACPUS 2 #define XLNX_VERSAL_NR_RCPUS 2 @@ -137,6 +141,12 @@ struct Versal { } cfg; }; +struct VersalClass { + SysBusDeviceClass parent; + + VersalVersion version; +}; + /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ -- cgit 1.4.1