From a0ff4a879cd3198adb4213653d51a39d053ef2d6 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 1 Mar 2024 10:41:07 -1000 Subject: accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow the target to set tlb flags to apply to all of the comparators. Remove MemTxAttrs.byte_swap, as the bit is not relevant to memory transactions, only the page mapping. Adjust target/sparc to set TLB_BSWAP directly. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Message-id: 20240301204110.656742-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- include/hw/core/cpu.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/hw/core/cpu.h') diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d0e345419f..ec14f74ce5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -230,6 +230,9 @@ typedef struct CPUTLBEntryFull { /* @lg_page_size contains the log2 of the page size. */ uint8_t lg_page_size; + /* Additional tlb flags requested by tlb_fill. */ + uint8_t tlb_fill_flags; + /* * Additional tlb flags for use by the slow path. If non-zero, * the corresponding CPUTLBEntry comparator must have TLB_FORCE_SLOW. -- cgit 1.4.1