From 641be69745c49d3c35efb62ee41d21d701b210ba Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 8 Apr 2022 15:15:32 +0100 Subject: hw/intc/arm_gicv3: Implement new GICv4 redistributor registers Implement the new GICv4 redistributor registers: GICR_VPROPBASER and GICR_VPENDBASER; for the moment we implement these as simple reads-as-written stubs, together with the necessary migration and reset handling. We don't put ID-register checks on the handling of these registers, because they are all in the only-in-v4 extra register frames, so they're not accessible in a GICv3. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20220408141550.1271295-24-peter.maydell@linaro.org --- include/hw/intc/arm_gicv3_common.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/hw/intc/arm_gicv3_common.h') diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 40bc404a65..7ff5a1aa5f 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -179,6 +179,9 @@ struct GICv3CPUState { uint32_t gicr_igrpmodr0; uint32_t gicr_nsacr; uint8_t gicr_ipriorityr[GIC_INTERNAL]; + /* VLPI_base page registers */ + uint64_t gicr_vpropbaser; + uint64_t gicr_vpendbaser; /* CPU interface */ uint64_t icc_sre_el1; -- cgit 1.4.1