From 49eba52a52fec563af83a77d5ec5c59dba412127 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Wed, 8 May 2024 14:06:49 +0100 Subject: hw/intc/loongson_ipi: Provide per core MMIO address spaces MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The real IPI hardware have dedicated MMIO registers mapped into memory address space for every core. This is not used by LoongArch guest software but it is essential for CPU without IOCSR such as Loongson-3A1000. Implement it with existing infrastructure. Acked-by: Song Gao Signed-off-by: Jiaxun Yang Message-ID: <20240605-loongson3-ipi-v3-2-ddd2c0e03fa3@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/hw/intc') diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index 2c0e8820f5..3f795edbf3 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -34,6 +34,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPI, LOONGSON_IPI) typedef struct IPICore { + LoongsonIPI *ipi; + MemoryRegion *ipi_mmio_mem; uint32_t status; uint32_t en; uint32_t set; -- cgit 1.4.1