From 4d4baab24179b51072f5e182aa41d44306ed593c Mon Sep 17 00:00:00 2001 From: Song Gao Date: Tue, 16 Sep 2025 20:21:02 +0800 Subject: loongarch: add a direct interrupt controller device Add Loongarch direct interrupt controller device base Definition. Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-ID: <20250916122109.749813-5-gaosong@loongson.cn> --- include/hw/intc/loongarch_dintc.h | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 include/hw/intc/loongarch_dintc.h (limited to 'include/hw/intc') diff --git a/include/hw/intc/loongarch_dintc.h b/include/hw/intc/loongarch_dintc.h new file mode 100644 index 0000000000..aa94cd1003 --- /dev/null +++ b/include/hw/intc/loongarch_dintc.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * LoongArch direct interrupt controller definitions + * + * Copyright (C) 2025 Loongson Technology Corporation Limited + */ + +#include "qom/object.h" +#include "hw/sysbus.h" +#include "hw/loongarch/virt.h" + + +#define NR_VECTORS 256 + +#define TYPE_LOONGARCH_DINTC "loongarch_dintc" +OBJECT_DECLARE_TYPE(LoongArchDINTCState, LoongArchDINTCClass, LOONGARCH_DINTC) + +typedef struct DINTCCore { + CPUState *cpu; + qemu_irq parent_irq; + uint64_t arch_id; +} DINTCCore; + +struct LoongArchDINTCState { + SysBusDevice parent_obj; + DINTCCore *cpu; + uint32_t num_cpu; +}; + +struct LoongArchDINTCClass { + SysBusDeviceClass parent_class; + + DeviceRealize parent_realize; + DeviceUnrealize parent_unrealize; +}; -- cgit 1.4.1