From f22e598a72ceecb1ef3ca36f3be8989b5f3bed2c Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Fri, 16 Aug 2024 16:00:45 +0200 Subject: hw/xen: pvh-common: Add support for creating PCIe/GPEX Add support for optionally creating a PCIe/GPEX controller. Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini --- include/hw/xen/xen-pvh-common.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'include/hw/xen/xen-pvh-common.h') diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-common.h index 77fd98b9fe..bc09eea936 100644 --- a/include/hw/xen/xen-pvh-common.h +++ b/include/hw/xen/xen-pvh-common.h @@ -25,10 +25,29 @@ struct XenPVHMachineClass { /* PVH implementation specific init. */ void (*init)(MachineState *state); + /* + * set_pci_intx_irq - Deliver INTX irqs to the guest. + * + * @opaque: pointer to XenPVHMachineState. + * @irq: IRQ after swizzling, between 0-3. + * @level: IRQ level. + */ + void (*set_pci_intx_irq)(void *opaque, int irq, int level); + + /* + * set_pci_link_route: - optional implementation call to setup + * routing between INTX IRQ (0 - 3) and GSI's. + * + * @line: line the INTx line (0 => A .. 3 => B) + * @irq: GSI + */ + int (*set_pci_link_route)(uint8_t line, uint8_t irq); + /* * Each implementation can optionally enable features that it * supports and are known to work. */ + bool has_pci; bool has_tpm; bool has_virtio_mmio; }; @@ -44,6 +63,12 @@ struct XenPVHMachineState { MemoryRegion high; } ram; + struct { + GPEXHost gpex; + MemoryRegion mmio_alias; + MemoryRegion mmio_high_alias; + } pci; + struct { MemMapEntry ram_low, ram_high; MemMapEntry tpm; @@ -52,6 +77,10 @@ struct XenPVHMachineState { MemMapEntry virtio_mmio; uint32_t virtio_mmio_num; uint32_t virtio_mmio_irq_base; + + /* PCI */ + MemMapEntry pci_ecam, pci_mmio, pci_mmio_high; + uint32_t pci_intx_irq_base; } cfg; }; -- cgit 1.4.1