From 0559e60669bae9c047cd5cf6f9be38ea7ced39b2 Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Tue, 4 Jun 2024 13:44:30 +0800 Subject: aspeed/smc: support different memory region ops for SMC flash region MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It set "aspeed_smc_flash_ops" struct which containing read and write callbacks to be used when I/O is performed on the SMC flash region. And it set the valid max_access_size 4 by default for all ASPEED SMC models. However, the valid max_access_size 4 only support 32 bits CPUs. To support all ASPEED SMC model, introduce a new "const MemoryRegionOps *" attribute in AspeedSMCClass and use it in aspeed_smc_flash_realize function. Signed-off-by: Troy Lee Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater --- include/hw/ssi/aspeed_smc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index d305ce2e2f..234dca32b0 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -115,6 +115,7 @@ struct AspeedSMCClass { AspeedSegments *seg); void (*dma_ctrl)(AspeedSMCState *s, uint32_t value); int (*addr_width)(const AspeedSMCState *s); + const MemoryRegionOps *reg_ops; }; #endif /* ASPEED_SMC_H */ -- cgit 1.4.1