From 94500e83eaf4a577ee4ce5ce16be0587ed04a225 Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Tue, 3 Sep 2024 16:35:18 +0800 Subject: hw/i2c/aspeed: Support discontinuous register memory region of I2C bus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It only support continuous register memory region for all I2C bus. However, the register address of all I2c bus are discontinuous for AST2700. Ex: the register address of I2C bus for ast2700 as following. 0x100 - 0x17F: Device 0 0x200 - 0x27F: Device 1 0x300 - 0x37F: Device 2 0x400 - 0x47F: Device 3 0x500 - 0x57F: Device 4 0x600 - 0x67F: Device 5 0x700 - 0x77F: Device 6 0x800 - 0x87F: Device 7 0x900 - 0x97F: Device 8 0xA00 - 0xA7F: Device 9 0xB00 - 0xB7F: Device 10 0xC00 - 0xC7F: Device 11 0xD00 - 0xD7F: Device 12 0xE00 - 0xE7F: Device 13 0xF00 – 0xF7F: Device 14 0x1000 – 0x107F: Device 15 Introduce a new class attribute to make user set each I2C bus gap size. Update formula to create all I2C bus register memory regions. Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater --- include/hw/i2c/aspeed_i2c.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h index fad5e9259a..02ede85906 100644 --- a/include/hw/i2c/aspeed_i2c.h +++ b/include/hw/i2c/aspeed_i2c.h @@ -275,6 +275,7 @@ struct AspeedI2CClass { uint8_t num_busses; uint8_t reg_size; + uint32_t reg_gap_size; uint8_t gap; qemu_irq (*bus_get_irq)(AspeedI2CBus *); -- cgit 1.4.1