From 05c84cf8df23b8dc81317ee0cea748e6199637f4 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 2 Aug 2025 10:12:01 +1000 Subject: semihosting: Retrieve stack top from image_info Remove the write-once field TaskState.stack_base, and use the same value from struct image_info. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/riscv/cpu_loop.c | 1 - 1 file changed, 1 deletion(-) (limited to 'linux-user/riscv/cpu_loop.c') diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 3ac8bbfec1..541de765ff 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -109,7 +109,6 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) exit(EXIT_FAILURE); } - ts->stack_base = info->start_stack; ts->heap_base = info->brk; /* This will be filled in on the first SYS_HEAPINFO call. */ ts->heap_limit = 0; -- cgit 1.4.1 From 7adf9ebb0ac72637833f61e24e44def6228b4484 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 2 Aug 2025 10:25:12 +1000 Subject: semihosting: Initialize heap once per process While semihosting isn't really thread aware, the current implementation allocates space for the heap per-thread. Remove the heap_base and heap_limit fields from TaskState. Replace with static variables within do_common_semihosting. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/cpu_loop.c | 7 ------- linux-user/arm/cpu_loop.c | 25 +++++++++++-------------- linux-user/m68k/cpu_loop.c | 8 -------- linux-user/qemu.h | 5 ----- linux-user/riscv/cpu_loop.c | 4 ---- semihosting/arm-compat-semi.c | 22 +++++++++------------- 6 files changed, 20 insertions(+), 51 deletions(-) (limited to 'linux-user/riscv/cpu_loop.c') diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index b65999a75b..030a630c93 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -140,9 +140,6 @@ void cpu_loop(CPUARMState *env) void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { ARMCPU *cpu = env_archcpu(env); - CPUState *cs = env_cpu(env); - TaskState *ts = get_task_state(cs); - struct image_info *info = ts->info; int i; if (!(arm_feature(env, ARM_FEATURE_AARCH64))) { @@ -167,8 +164,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) if (cpu_isar_feature(aa64_pauth, cpu)) { qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys)); } - - ts->heap_base = info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit = 0; } diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index e40d6beafa..9d54422736 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -492,19 +492,16 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) for(i = 0; i < 16; i++) { env->regs[i] = regs->uregs[i]; } -#if TARGET_BIG_ENDIAN - /* Enable BE8. */ - if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4 - && (info->elf_flags & EF_ARM_BE8)) { - env->uncached_cpsr |= CPSR_E; - env->cp15.sctlr_el[1] |= SCTLR_E0E; - } else { - env->cp15.sctlr_el[1] |= SCTLR_B; - } - arm_rebuild_hflags(env); -#endif - ts->heap_base = info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit = 0; + if (TARGET_BIG_ENDIAN) { + /* Enable BE8. */ + if (EF_ARM_EABI_VERSION(info->elf_flags) >= EF_ARM_EABI_VER4 + && (info->elf_flags & EF_ARM_BE8)) { + env->uncached_cpsr |= CPSR_E; + env->cp15.sctlr_el[1] |= SCTLR_E0E; + } else { + env->cp15.sctlr_el[1] |= SCTLR_B; + } + arm_rebuild_hflags(env); + } } diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 3aaaf02ca4..23693f3358 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -94,10 +94,6 @@ void cpu_loop(CPUM68KState *env) void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) { - CPUState *cpu = env_cpu(env); - TaskState *ts = get_task_state(cpu); - struct image_info *info = ts->info; - env->pc = regs->pc; env->dregs[0] = regs->d0; env->dregs[1] = regs->d1; @@ -116,8 +112,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) env->aregs[6] = regs->a6; env->aregs[7] = regs->usp; env->sr = regs->sr; - - ts->heap_base = info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit = 0; } diff --git a/linux-user/qemu.h b/linux-user/qemu.h index b6621536b3..4d6fad28c6 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -121,11 +121,6 @@ struct TaskState { abi_ulong child_tidptr; #ifdef TARGET_M68K abi_ulong tp_value; -#endif -#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_RISCV) - /* Extra fields for semihosted binaries. */ - abi_ulong heap_base; - abi_ulong heap_limit; #endif int used; /* non zero if used */ struct image_info *info; diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 541de765ff..2dd30c7b28 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -108,8 +108,4 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) error_report("Incompatible ELF: RVE cpu requires RVE ABI binary"); exit(EXIT_FAILURE); } - - ts->heap_base = info->brk; - /* This will be filled in on the first SYS_HEAPINFO call. */ - ts->heap_limit = 0; } diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index bc04b02eba..bcd13cd6df 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -666,7 +666,7 @@ void do_common_semihosting(CPUState *cs) int i; #ifdef CONFIG_USER_ONLY TaskState *ts = get_task_state(cs); - target_ulong limit; + static abi_ulong heapbase, heaplimit; #else LayoutInfo info = common_semi_find_bases(cs); #endif @@ -678,24 +678,20 @@ void do_common_semihosting(CPUState *cs) * Some C libraries assume the heap immediately follows .bss, so * allocate it using sbrk. */ - if (!ts->heap_limit) { - abi_ulong ret; - - ts->heap_base = do_brk(0); - limit = ts->heap_base + COMMON_SEMI_HEAP_SIZE; + if (!heaplimit) { + heapbase = do_brk(0); /* Try a big heap, and reduce the size if that fails. */ - for (;;) { - ret = do_brk(limit); + for (abi_ulong size = COMMON_SEMI_HEAP_SIZE; ; size >>= 1) { + abi_ulong limit = heapbase + size; + abi_ulong ret = do_brk(limit); if (ret >= limit) { + heaplimit = limit; break; } - limit = (ts->heap_base >> 1) + (limit >> 1); } - ts->heap_limit = limit; } - - retvals[0] = ts->heap_base; - retvals[1] = ts->heap_limit; + retvals[0] = heapbase; + retvals[1] = heaplimit; /* * Note that semihosting is *not* thread aware. * Always return the stack base of the main thread. -- cgit 1.4.1 From a56cf00bc06a11627ec7b695618532d0d58cf8de Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 28 Jul 2025 22:06:12 -1000 Subject: linux-user/riscv: Create init_main_thread Merge init_thread and target_cpu_copy_regs. There's no point going through a target_pt_regs intermediate. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/elfload.c | 7 +------ linux-user/riscv/cpu_loop.c | 10 ++++------ 2 files changed, 5 insertions(+), 12 deletions(-) (limited to 'linux-user/riscv/cpu_loop.c') diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 16aa09214e..556f11d720 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -849,12 +849,7 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, #define VDSO_HEADER "vdso-64.c.inc" #endif -static inline void init_thread(struct target_pt_regs *regs, - struct image_info *infop) -{ - regs->sepc = infop->entry; - regs->sp = infop->start_stack; -} +#define HAVE_INIT_MAIN_THREAD #define ELF_EXEC_PAGESIZE 4096 diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 2dd30c7b28..b316281532 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -94,14 +94,12 @@ void cpu_loop(CPURISCVState *env) } } -void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs) +void init_main_thread(CPUState *cs, struct image_info *info) { - CPUState *cpu = env_cpu(env); - TaskState *ts = get_task_state(cpu); - struct image_info *info = ts->info; + CPUArchState *env = cpu_env(cs); - env->pc = regs->sepc; - env->gpr[xSP] = regs->sp; + env->pc = info->entry; + env->gpr[xSP] = info->start_stack; env->elf_flags = info->elf_flags; if ((env->misa_ext & RVE) && !(env->elf_flags & EF_RISCV_RVE)) { -- cgit 1.4.1