From 92c9983c06fa0a55f120c71dda03e38d5220fccc Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sun, 27 Jul 2025 21:28:05 -1000 Subject: linux-user: Move get_elf_hwcap to sh4/elfload.c Change the return type to abi_ulong, and pass in the cpu. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/sh4/elfload.c | 27 +++++++++++++++++++++++++++ linux-user/sh4/target_elf.h | 2 ++ 2 files changed, 29 insertions(+) (limited to 'linux-user/sh4') diff --git a/linux-user/sh4/elfload.c b/linux-user/sh4/elfload.c index 546034ec07..99ad4f6334 100644 --- a/linux-user/sh4/elfload.c +++ b/linux-user/sh4/elfload.c @@ -9,3 +9,30 @@ const char *get_elf_cpu_model(uint32_t eflags) { return "sh7785"; } + +enum { + SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */ + SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */ + SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */ + SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */ + SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */ + SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */ + SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */ + SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */ + SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */ + SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */ +}; + +abi_ulong get_elf_hwcap(CPUState *cs) +{ + SuperHCPU *cpu = SUPERH_CPU(cs); + abi_ulong hwcap = 0; + + hwcap |= SH_CPU_HAS_FPU; + + if (cpu->env.features & SH_FEATURE_SH4A) { + hwcap |= SH_CPU_HAS_LLSC; + } + + return hwcap; +} diff --git a/linux-user/sh4/target_elf.h b/linux-user/sh4/target_elf.h index d17011bd75..badd0f5371 100644 --- a/linux-user/sh4/target_elf.h +++ b/linux-user/sh4/target_elf.h @@ -8,4 +8,6 @@ #ifndef SH4_TARGET_ELF_H #define SH4_TARGET_ELF_H +#define HAVE_ELF_HWCAP 1 + #endif -- cgit 1.4.1