From 6f4e1405b91da0d0a1084ae3aff2bd308432778f Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Mon, 20 Jul 2020 10:25:36 +0100 Subject: hw/arm/virt: Enable MTE via a machine property Control this cpu feature via a machine property, much as we do with secure=on, since both require specialized support in the machine setup to be functional. Default MTE to off, since this feature implies extra overhead. Signed-off-by: Richard Henderson Message-id: 20200713213341.590275-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu64.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'target/arm/cpu64.c') diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 15494002d2..dd696183df 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -646,8 +646,9 @@ static void aarch64_max_initfn(Object *obj) t = cpu->isar.id_aa64pfr1; t = FIELD_DP64(t, ID_AA64PFR1, BT, 1); /* - * Begin with full support for MTE; will be downgraded to MTE=1 - * during realize if the board provides no tag memory. + * Begin with full support for MTE. This will be downgraded to MTE=0 + * during realize if the board provides no tag memory, much like + * we do for EL2 with the virtualization=on property. */ t = FIELD_DP64(t, ID_AA64PFR1, MTE, 2); cpu->isar.id_aa64pfr1 = t; -- cgit 1.4.1