From 399a8c766c0526b51cd180e1b1c776d6dc95bad8 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 17 Jun 2021 13:15:52 +0100 Subject: target/arm: Implement MVE VNEG Implement the MVE VNEG insn (both integer and floating point forms). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20210617121628.20116-9-peter.maydell@linaro.org --- target/arm/translate-mve.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'target/arm/translate-mve.c') diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 90996813a8..ad2e4af284 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -200,6 +200,7 @@ static bool do_1op(DisasContext *s, arg_1op *a, MVEGenOneOpFn fn) DO_1OP(VCLZ, vclz) DO_1OP(VCLS, vcls) DO_1OP(VABS, vabs) +DO_1OP(VNEG, vneg) static bool trans_VREV16(DisasContext *s, arg_1op *a) { @@ -252,3 +253,17 @@ static bool trans_VABS_fp(DisasContext *s, arg_1op *a) } return do_1op(s, a, fns[a->size]); } + +static bool trans_VNEG_fp(DisasContext *s, arg_1op *a) +{ + static MVEGenOneOpFn * const fns[] = { + NULL, + gen_helper_mve_vfnegh, + gen_helper_mve_vfnegs, + NULL, + }; + if (!dc_isar_feature(aa32_mve_fp, s)) { + return false; + } + return do_1op(s, a, fns[a->size]); +} -- cgit 1.4.1