From 46e0cf762985e0a85529efd454402998c5021212 Mon Sep 17 00:00:00 2001 From: Marc Marí Date: Mon, 1 Sep 2014 12:07:55 +0200 Subject: tests: Add virtio device initialization MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add functions to read and write virtio header fields. Add status bit setting in virtio-blk-device. Signed-off-by: Marc Marí Signed-off-by: Stefan Hajnoczi --- tests/libqos/virtio.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 tests/libqos/virtio.c (limited to 'tests/libqos/virtio.c') diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c new file mode 100644 index 0000000000..577d679136 --- /dev/null +++ b/tests/libqos/virtio.c @@ -0,0 +1,55 @@ +/* + * libqos virtio driver + * + * Copyright (c) 2014 Marc Marí + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include +#include "libqtest.h" +#include "libqos/virtio.h" + +uint8_t qvirtio_config_readb(const QVirtioBus *bus, QVirtioDevice *d, + void *addr) +{ + return bus->config_readb(d, addr); +} + +uint16_t qvirtio_config_readw(const QVirtioBus *bus, QVirtioDevice *d, + void *addr) +{ + return bus->config_readw(d, addr); +} + +uint32_t qvirtio_config_readl(const QVirtioBus *bus, QVirtioDevice *d, + void *addr) +{ + return bus->config_readl(d, addr); +} + +uint64_t qvirtio_config_readq(const QVirtioBus *bus, QVirtioDevice *d, + void *addr) +{ + return bus->config_readq(d, addr); +} + +void qvirtio_reset(const QVirtioBus *bus, QVirtioDevice *d) +{ + bus->set_status(d, QVIRTIO_RESET); + g_assert_cmphex(bus->get_status(d), ==, QVIRTIO_RESET); +} + +void qvirtio_set_acknowledge(const QVirtioBus *bus, QVirtioDevice *d) +{ + bus->set_status(d, bus->get_status(d) | QVIRTIO_ACKNOWLEDGE); + g_assert_cmphex(bus->get_status(d), ==, QVIRTIO_ACKNOWLEDGE); +} + +void qvirtio_set_driver(const QVirtioBus *bus, QVirtioDevice *d) +{ + bus->set_status(d, bus->get_status(d) | QVIRTIO_DRIVER); + g_assert_cmphex(bus->get_status(d), ==, + QVIRTIO_DRIVER | QVIRTIO_ACKNOWLEDGE); +} -- cgit 1.4.1 From bf3c63d2010c5ef52f8b988bee2a1486a056795f Mon Sep 17 00:00:00 2001 From: Marc Marí Date: Mon, 1 Sep 2014 12:07:56 +0200 Subject: libqos: Added basic virtqueue support to virtio implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add status changing and feature negotiation. Add basic virtqueue support for adding and sending virtqueue requests. Add ISR checking. [Squashed request endianness fix by Greg Kurz --Stefan] Reviewed-by: Stefan Hajnoczi Signed-off-by: Marc Marí Signed-off-by: Stefan Hajnoczi --- tests/libqos/virtio-pci.c | 82 +++++++++++++++++++ tests/libqos/virtio-pci.h | 2 + tests/libqos/virtio.c | 100 +++++++++++++++++++++++ tests/libqos/virtio.h | 99 +++++++++++++++++++++++ tests/virtio-blk-test.c | 196 +++++++++++++++++++++++++++++++++++++++++++++- 5 files changed, 476 insertions(+), 3 deletions(-) (limited to 'tests/libqos/virtio.c') diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c index 1a37620001..12b06a2f53 100644 --- a/tests/libqos/virtio-pci.c +++ b/tests/libqos/virtio-pci.c @@ -14,6 +14,8 @@ #include "libqos/virtio-pci.h" #include "libqos/pci.h" #include "libqos/pci-pc.h" +#include "libqos/malloc.h" +#include "libqos/malloc-pc.h" #include "hw/pci/pci_regs.h" @@ -93,6 +95,18 @@ static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, void *addr) return u64; } +static uint32_t qvirtio_pci_get_features(QVirtioDevice *d) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + return qpci_io_readl(dev->pdev, dev->addr + QVIRTIO_DEVICE_FEATURES); +} + +static void qvirtio_pci_set_features(QVirtioDevice *d, uint32_t features) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + qpci_io_writel(dev->pdev, dev->addr + QVIRTIO_GUEST_FEATURES, features); +} + static uint8_t qvirtio_pci_get_status(QVirtioDevice *d) { QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; @@ -105,13 +119,81 @@ static void qvirtio_pci_set_status(QVirtioDevice *d, uint8_t status) qpci_io_writeb(dev->pdev, dev->addr + QVIRTIO_DEVICE_STATUS, status); } +static uint8_t qvirtio_pci_get_isr_status(QVirtioDevice *d) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + return qpci_io_readb(dev->pdev, dev->addr + QVIRTIO_ISR_STATUS); +} + +static void qvirtio_pci_queue_select(QVirtioDevice *d, uint16_t index) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + qpci_io_writeb(dev->pdev, dev->addr + QVIRTIO_QUEUE_SELECT, index); +} + +static uint16_t qvirtio_pci_get_queue_size(QVirtioDevice *d) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + return qpci_io_readw(dev->pdev, dev->addr + QVIRTIO_QUEUE_SIZE); +} + +static void qvirtio_pci_set_queue_address(QVirtioDevice *d, uint32_t pfn) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + qpci_io_writel(dev->pdev, dev->addr + QVIRTIO_QUEUE_ADDRESS, pfn); +} + +static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d, + QGuestAllocator *alloc, uint16_t index) +{ + uint64_t addr; + QVirtQueue *vq; + + vq = g_malloc0(sizeof(*vq)); + + qvirtio_pci_queue_select(d, index); + vq->index = index; + vq->size = qvirtio_pci_get_queue_size(d); + vq->free_head = 0; + vq->num_free = vq->size; + vq->align = QVIRTIO_PCI_ALIGN; + + /* Check different than 0 */ + g_assert_cmpint(vq->size, !=, 0); + + /* Check power of 2 */ + g_assert_cmpint(vq->size & (vq->size - 1), ==, 0); + + addr = guest_alloc(alloc, qvring_size(vq->size, QVIRTIO_PCI_ALIGN)); + qvring_init(alloc, vq, addr); + qvirtio_pci_set_queue_address(d, vq->desc / QVIRTIO_PCI_ALIGN); + + /* TODO: MSI-X configuration */ + + return vq; +} + +static void qvirtio_pci_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + qpci_io_writew(dev->pdev, dev->addr + QVIRTIO_QUEUE_NOTIFY, vq->index); +} + const QVirtioBus qvirtio_pci = { .config_readb = qvirtio_pci_config_readb, .config_readw = qvirtio_pci_config_readw, .config_readl = qvirtio_pci_config_readl, .config_readq = qvirtio_pci_config_readq, + .get_features = qvirtio_pci_get_features, + .set_features = qvirtio_pci_set_features, .get_status = qvirtio_pci_get_status, .set_status = qvirtio_pci_set_status, + .get_isr_status = qvirtio_pci_get_isr_status, + .queue_select = qvirtio_pci_queue_select, + .get_queue_size = qvirtio_pci_get_queue_size, + .set_queue_address = qvirtio_pci_set_queue_address, + .virtqueue_setup = qvirtio_pci_virtqueue_setup, + .virtqueue_kick = qvirtio_pci_virtqueue_kick, }; void qvirtio_pci_foreach(QPCIBus *bus, uint16_t device_type, diff --git a/tests/libqos/virtio-pci.h b/tests/libqos/virtio-pci.h index 26f902ecb6..40bd12db13 100644 --- a/tests/libqos/virtio-pci.h +++ b/tests/libqos/virtio-pci.h @@ -26,6 +26,8 @@ #define QVIRTIO_DEVICE_SPECIFIC_MSIX 0x18 #define QVIRTIO_DEVICE_SPECIFIC_NO_MSIX 0x14 +#define QVIRTIO_PCI_ALIGN 4096 + typedef struct QVirtioPCIDevice { QVirtioDevice vdev; QPCIDevice *pdev; diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c index 577d679136..de92642819 100644 --- a/tests/libqos/virtio.c +++ b/tests/libqos/virtio.c @@ -35,6 +35,23 @@ uint64_t qvirtio_config_readq(const QVirtioBus *bus, QVirtioDevice *d, return bus->config_readq(d, addr); } +uint32_t qvirtio_get_features(const QVirtioBus *bus, QVirtioDevice *d) +{ + return bus->get_features(d); +} + +void qvirtio_set_features(const QVirtioBus *bus, QVirtioDevice *d, + uint32_t features) +{ + bus->set_features(d, features); +} + +QVirtQueue *qvirtqueue_setup(const QVirtioBus *bus, QVirtioDevice *d, + QGuestAllocator *alloc, uint16_t index) +{ + return bus->virtqueue_setup(d, alloc, index); +} + void qvirtio_reset(const QVirtioBus *bus, QVirtioDevice *d) { bus->set_status(d, QVIRTIO_RESET); @@ -53,3 +70,86 @@ void qvirtio_set_driver(const QVirtioBus *bus, QVirtioDevice *d) g_assert_cmphex(bus->get_status(d), ==, QVIRTIO_DRIVER | QVIRTIO_ACKNOWLEDGE); } + +void qvirtio_set_driver_ok(const QVirtioBus *bus, QVirtioDevice *d) +{ + bus->set_status(d, bus->get_status(d) | QVIRTIO_DRIVER_OK); + g_assert_cmphex(bus->get_status(d), ==, + QVIRTIO_DRIVER_OK | QVIRTIO_DRIVER | QVIRTIO_ACKNOWLEDGE); +} + +bool qvirtio_wait_isr(const QVirtioBus *bus, QVirtioDevice *d, uint8_t mask, + uint64_t timeout) +{ + do { + clock_step(10); + if (bus->get_isr_status(d) & mask) { + break; /* It has ended */ + } + } while (--timeout); + + return timeout != 0; +} + +void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr) +{ + int i; + + vq->desc = addr; + vq->avail = vq->desc + vq->size*sizeof(QVRingDesc); + vq->used = (uint64_t)((vq->avail + sizeof(uint16_t) * (3 + vq->size) + + vq->align - 1) & ~(vq->align - 1)); + + for (i = 0; i < vq->size - 1; i++) { + /* vq->desc[i].addr */ + writew(vq->desc + (16 * i), 0); + /* vq->desc[i].next */ + writew(vq->desc + (16 * i) + 14, i + 1); + } + + /* vq->avail->flags */ + writew(vq->avail, 0); + /* vq->avail->idx */ + writew(vq->avail + 2, 0); + + /* vq->used->flags */ + writew(vq->used, 0); +} + +uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write, + bool next) +{ + uint16_t flags = 0; + vq->num_free--; + + if (write) { + flags |= QVRING_DESC_F_WRITE; + } + + if (next) { + flags |= QVRING_DESC_F_NEXT; + } + + /* vq->desc[vq->free_head].addr */ + writeq(vq->desc + (16 * vq->free_head), data); + /* vq->desc[vq->free_head].len */ + writel(vq->desc + (16 * vq->free_head) + 8, len); + /* vq->desc[vq->free_head].flags */ + writew(vq->desc + (16 * vq->free_head) + 12, flags); + + return vq->free_head++; /* Return and increase, in this order */ +} + +void qvirtqueue_kick(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, + uint32_t free_head) +{ + /* vq->avail->idx */ + uint16_t idx = readl(vq->avail + 2); + + /* vq->avail->ring[idx % vq->size] */ + writel(vq->avail + 4 + (2 * (idx % vq->size)), free_head); + /* vq->avail->idx */ + writel(vq->avail + 2, idx + 1); + + bus->virtqueue_kick(d, vq); +} diff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h index 8d7238bd91..aba5a1e12c 100644 --- a/tests/libqos/virtio.h +++ b/tests/libqos/virtio.h @@ -10,33 +10,117 @@ #ifndef LIBQOS_VIRTIO_H #define LIBQOS_VIRTIO_H +#include "libqos/malloc.h" + #define QVIRTIO_VENDOR_ID 0x1AF4 #define QVIRTIO_RESET 0x0 #define QVIRTIO_ACKNOWLEDGE 0x1 #define QVIRTIO_DRIVER 0x2 +#define QVIRTIO_DRIVER_OK 0x4 #define QVIRTIO_NET_DEVICE_ID 0x1 #define QVIRTIO_BLK_DEVICE_ID 0x2 +#define QVRING_DESC_F_NEXT 0x1 +#define QVRING_DESC_F_WRITE 0x2 +#define QVRING_DESC_F_INDIRECT 0x4 + +#define QVIRTIO_F_NOTIFY_ON_EMPTY 0x01000000 +#define QVIRTIO_F_ANY_LAYOUT 0x08000000 +#define QVIRTIO_F_RING_INDIRECT_DESC 0x10000000 +#define QVIRTIO_F_RING_EVENT_IDX 0x20000000 +#define QVIRTIO_F_BAD_FEATURE 0x40000000 + +#define QVRING_AVAIL_F_NO_INTERRUPT 1 + +#define QVRING_USED_F_NO_NOTIFY 1 + typedef struct QVirtioDevice { /* Device type */ uint16_t device_type; } QVirtioDevice; +typedef struct QVRingDesc { + uint64_t addr; + uint32_t len; + uint16_t flags; + uint16_t next; +} QVRingDesc; + +typedef struct QVRingAvail { + uint16_t flags; + uint16_t idx; + uint16_t ring[0]; /* This is an array of uint16_t */ +} QVRingAvail; + +typedef struct QVRingUsedElem { + uint32_t id; + uint32_t len; +} QVRingUsedElem; + +typedef struct QVRingUsed { + uint16_t flags; + uint16_t idx; + QVRingUsedElem ring[0]; /* This is an array of QVRingUsedElem structs */ +} QVRingUsed; + +typedef struct QVirtQueue { + uint64_t desc; /* This points to an array of QVRingDesc */ + uint64_t avail; /* This points to a QVRingAvail */ + uint64_t used; /* This points to a QVRingDesc */ + uint16_t index; + uint32_t size; + uint32_t free_head; + uint32_t num_free; + uint32_t align; +} QVirtQueue; + typedef struct QVirtioBus { uint8_t (*config_readb)(QVirtioDevice *d, void *addr); uint16_t (*config_readw)(QVirtioDevice *d, void *addr); uint32_t (*config_readl)(QVirtioDevice *d, void *addr); uint64_t (*config_readq)(QVirtioDevice *d, void *addr); + /* Get features of the device */ + uint32_t (*get_features)(QVirtioDevice *d); + + /* Get features of the device */ + void (*set_features)(QVirtioDevice *d, uint32_t features); + /* Get status of the device */ uint8_t (*get_status)(QVirtioDevice *d); /* Set status of the device */ void (*set_status)(QVirtioDevice *d, uint8_t status); + + /* Get the ISR status of the device */ + uint8_t (*get_isr_status)(QVirtioDevice *d); + + /* Select a queue to work on */ + void (*queue_select)(QVirtioDevice *d, uint16_t index); + + /* Get the size of the selected queue */ + uint16_t (*get_queue_size)(QVirtioDevice *d); + + /* Set the address of the selected queue */ + void (*set_queue_address)(QVirtioDevice *d, uint32_t pfn); + + /* Setup the virtqueue specified by index */ + QVirtQueue *(*virtqueue_setup)(QVirtioDevice *d, QGuestAllocator *alloc, + uint16_t index); + + /* Notify changes in virtqueue */ + void (*virtqueue_kick)(QVirtioDevice *d, QVirtQueue *vq); } QVirtioBus; +static inline uint32_t qvring_size(uint32_t num, uint32_t align) +{ + return ((sizeof(struct QVRingDesc) * num + sizeof(uint16_t) * (3 + num) + + align - 1) & ~(align - 1)) + + sizeof(uint16_t) * 3 + sizeof(struct QVRingUsedElem) * num; +} + uint8_t qvirtio_config_readb(const QVirtioBus *bus, QVirtioDevice *d, void *addr); uint16_t qvirtio_config_readw(const QVirtioBus *bus, QVirtioDevice *d, @@ -45,9 +129,24 @@ uint32_t qvirtio_config_readl(const QVirtioBus *bus, QVirtioDevice *d, void *addr); uint64_t qvirtio_config_readq(const QVirtioBus *bus, QVirtioDevice *d, void *addr); +uint32_t qvirtio_get_features(const QVirtioBus *bus, QVirtioDevice *d); +void qvirtio_set_features(const QVirtioBus *bus, QVirtioDevice *d, + uint32_t features); void qvirtio_reset(const QVirtioBus *bus, QVirtioDevice *d); void qvirtio_set_acknowledge(const QVirtioBus *bus, QVirtioDevice *d); void qvirtio_set_driver(const QVirtioBus *bus, QVirtioDevice *d); +void qvirtio_set_driver_ok(const QVirtioBus *bus, QVirtioDevice *d); + +bool qvirtio_wait_isr(const QVirtioBus *bus, QVirtioDevice *d, uint8_t mask, + uint64_t timeout); +QVirtQueue *qvirtqueue_setup(const QVirtioBus *bus, QVirtioDevice *d, + QGuestAllocator *alloc, uint16_t index); + +void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr); +uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write, + bool next); +void qvirtqueue_kick(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, + uint32_t free_head); #endif diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c index 649f7cf94f..b048938083 100644 --- a/tests/virtio-blk-test.c +++ b/tests/virtio-blk-test.c @@ -17,10 +17,41 @@ #include "libqos/virtio.h" #include "libqos/virtio-pci.h" #include "libqos/pci-pc.h" +#include "libqos/malloc.h" +#include "libqos/malloc-pc.h" +#include "qemu/bswap.h" -#define TEST_IMAGE_SIZE (64 * 1024 * 1024) -#define PCI_SLOT 0x04 -#define PCI_FN 0x00 +#define QVIRTIO_BLK_F_BARRIER 0x00000001 +#define QVIRTIO_BLK_F_SIZE_MAX 0x00000002 +#define QVIRTIO_BLK_F_SEG_MAX 0x00000004 +#define QVIRTIO_BLK_F_GEOMETRY 0x00000010 +#define QVIRTIO_BLK_F_RO 0x00000020 +#define QVIRTIO_BLK_F_BLK_SIZE 0x00000040 +#define QVIRTIO_BLK_F_SCSI 0x00000080 +#define QVIRTIO_BLK_F_WCE 0x00000200 +#define QVIRTIO_BLK_F_TOPOLOGY 0x00000400 +#define QVIRTIO_BLK_F_CONFIG_WCE 0x00000800 + +#define QVIRTIO_BLK_T_IN 0 +#define QVIRTIO_BLK_T_OUT 1 +#define QVIRTIO_BLK_T_SCSI_CMD 2 +#define QVIRTIO_BLK_T_SCSI_CMD_OUT 3 +#define QVIRTIO_BLK_T_FLUSH 4 +#define QVIRTIO_BLK_T_FLUSH_OUT 5 +#define QVIRTIO_BLK_T_GET_ID 8 + +#define TEST_IMAGE_SIZE (64 * 1024 * 1024) +#define QVIRTIO_BLK_TIMEOUT 100 +#define PCI_SLOT 0x04 +#define PCI_FN 0x00 + +typedef struct QVirtioBlkReq { + uint32_t type; + uint32_t ioprio; + uint64_t sector; + char *data; + uint8_t status; +} QVirtioBlkReq; static QPCIBus *test_start(void) { @@ -66,12 +97,53 @@ static QVirtioPCIDevice *virtio_blk_init(QPCIBus *bus) return dev; } +static inline void virtio_blk_fix_request(QVirtioBlkReq *req) +{ +#ifdef HOST_WORDS_BIGENDIAN + bool host_endian = true; +#else + bool host_endian = false; +#endif + + if (qtest_big_endian() != host_endian) { + req->type = bswap32(req->type); + req->ioprio = bswap32(req->ioprio); + req->sector = bswap64(req->sector); + } +} + +static uint64_t virtio_blk_request(QGuestAllocator *alloc, QVirtioBlkReq *req, + uint64_t data_size) +{ + uint64_t addr; + uint8_t status = 0xFF; + + g_assert_cmpuint(data_size % 512, ==, 0); + addr = guest_alloc(alloc, sizeof(*req) + data_size); + + virtio_blk_fix_request(req); + + memwrite(addr, req, 16); + memwrite(addr + 16, req->data, data_size); + memwrite(addr + 16 + data_size, &status, sizeof(status)); + + return addr; +} + static void pci_basic(void) { QVirtioPCIDevice *dev; QPCIBus *bus; + QVirtQueue *vq; + QGuestAllocator *alloc; + QVirtioBlkReq req; void *addr; + uint64_t req_addr; uint64_t capacity; + uint32_t features; + uint32_t free_head; + uint8_t status; + char *data; bus = test_start(); @@ -83,6 +155,124 @@ static void pci_basic(void) capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr); g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512); + features = qvirtio_get_features(&qvirtio_pci, &dev->vdev); + features = features & ~(QVIRTIO_F_BAD_FEATURE | + QVIRTIO_F_RING_INDIRECT_DESC | QVIRTIO_F_RING_EVENT_IDX | + QVIRTIO_BLK_F_SCSI); + qvirtio_set_features(&qvirtio_pci, &dev->vdev, features); + + alloc = pc_alloc_init(); + vq = qvirtqueue_setup(&qvirtio_pci, &dev->vdev, alloc, 0); + + qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev); + + /* Write and read with 2 descriptor layout */ + /* Write request */ + req.type = QVIRTIO_BLK_T_OUT; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(vq, req_addr, 528, false, true); + qvirtqueue_add(vq, req_addr + 528, 1, true, false); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + + g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + QVIRTIO_BLK_TIMEOUT)); + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + guest_free(alloc, req_addr); + + /* Read request */ + req.type = QVIRTIO_BLK_T_IN; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(vq, req_addr, 16, false, true); + qvirtqueue_add(vq, req_addr + 16, 513, true, false); + + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + + g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + QVIRTIO_BLK_TIMEOUT)); + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + data = g_malloc0(512); + memread(req_addr + 16, data, 512); + g_assert_cmpstr(data, ==, "TEST"); + g_free(data); + + guest_free(alloc, req_addr); + + /* Write and read with 3 descriptor layout */ + /* Write request */ + req.type = QVIRTIO_BLK_T_OUT; + req.ioprio = 1; + req.sector = 1; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(vq, req_addr, 16, false, true); + qvirtqueue_add(vq, req_addr + 16, 512, false, true); + qvirtqueue_add(vq, req_addr + 528, 1, true, false); + + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + + g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + QVIRTIO_BLK_TIMEOUT)); + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + guest_free(alloc, req_addr); + + /* Read request */ + req.type = QVIRTIO_BLK_T_IN; + req.ioprio = 1; + req.sector = 1; + req.data = g_malloc0(512); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(vq, req_addr, 16, false, true); + qvirtqueue_add(vq, req_addr + 16, 512, true, true); + qvirtqueue_add(vq, req_addr + 528, 1, true, false); + + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + + g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + QVIRTIO_BLK_TIMEOUT)); + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + guest_free(alloc, req_addr); + + data = g_malloc0(512); + memread(req_addr + 16, data, 512); + g_assert_cmpstr(data, ==, "TEST"); + g_free(data); + + guest_free(alloc, req_addr); + + /* End test */ + guest_free(alloc, vq->desc); qvirtio_pci_device_disable(dev); g_free(dev); test_end(); -- cgit 1.4.1 From f294b029aa2beb1c67116e04bff5d331f0b18288 Mon Sep 17 00:00:00 2001 From: Marc Marí Date: Mon, 1 Sep 2014 12:07:57 +0200 Subject: libqos: Added indirect descriptor support to virtio implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add functions necessary for working with indirect descriptors. Add test using new functions. Reviewed-by: Stefan Hajnoczi Signed-off-by: Marc Marí Signed-off-by: Stefan Hajnoczi --- tests/libqos/virtio-pci.c | 10 +++++ tests/libqos/virtio.c | 64 +++++++++++++++++++++++++++++ tests/libqos/virtio.h | 22 +++++++++- tests/virtio-blk-test.c | 100 ++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 195 insertions(+), 1 deletion(-) (limited to 'tests/libqos/virtio.c') diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c index 12b06a2f53..cf15f7a45b 100644 --- a/tests/libqos/virtio-pci.c +++ b/tests/libqos/virtio-pci.c @@ -107,6 +107,12 @@ static void qvirtio_pci_set_features(QVirtioDevice *d, uint32_t features) qpci_io_writel(dev->pdev, dev->addr + QVIRTIO_GUEST_FEATURES, features); } +static uint32_t qvirtio_pci_get_guest_features(QVirtioDevice *d) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + return qpci_io_readl(dev->pdev, dev->addr + QVIRTIO_GUEST_FEATURES); +} + static uint8_t qvirtio_pci_get_status(QVirtioDevice *d) { QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; @@ -146,10 +152,12 @@ static void qvirtio_pci_set_queue_address(QVirtioDevice *d, uint32_t pfn) static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d, QGuestAllocator *alloc, uint16_t index) { + uint32_t feat; uint64_t addr; QVirtQueue *vq; vq = g_malloc0(sizeof(*vq)); + feat = qvirtio_pci_get_guest_features(d); qvirtio_pci_queue_select(d, index); vq->index = index; @@ -157,6 +165,7 @@ static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d, vq->free_head = 0; vq->num_free = vq->size; vq->align = QVIRTIO_PCI_ALIGN; + vq->indirect = (feat & QVIRTIO_F_RING_INDIRECT_DESC) != 0; /* Check different than 0 */ g_assert_cmpint(vq->size, !=, 0); @@ -186,6 +195,7 @@ const QVirtioBus qvirtio_pci = { .config_readq = qvirtio_pci_config_readq, .get_features = qvirtio_pci_get_features, .set_features = qvirtio_pci_set_features, + .get_guest_features = qvirtio_pci_get_guest_features, .get_status = qvirtio_pci_get_status, .set_status = qvirtio_pci_set_status, .get_isr_status = qvirtio_pci_get_isr_status, diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c index de92642819..b1cab1f699 100644 --- a/tests/libqos/virtio.c +++ b/tests/libqos/virtio.c @@ -116,6 +116,51 @@ void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr) writew(vq->used, 0); } +QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d, + QGuestAllocator *alloc, uint16_t elem) +{ + int i; + QVRingIndirectDesc *indirect = g_malloc(sizeof(*indirect)); + + indirect->index = 0; + indirect->elem = elem; + indirect->desc = guest_alloc(alloc, sizeof(QVRingDesc)*elem); + + for (i = 0; i < elem - 1; ++i) { + /* indirect->desc[i].addr */ + writeq(indirect->desc + (16 * i), 0); + /* indirect->desc[i].flags */ + writew(indirect->desc + (16 * i) + 12, QVRING_DESC_F_NEXT); + /* indirect->desc[i].next */ + writew(indirect->desc + (16 * i) + 14, i + 1); + } + + return indirect; +} + +void qvring_indirect_desc_add(QVRingIndirectDesc *indirect, uint64_t data, + uint32_t len, bool write) +{ + uint16_t flags; + + g_assert_cmpint(indirect->index, <, indirect->elem); + + flags = readw(indirect->desc + (16 * indirect->index) + 12); + + if (write) { + flags |= QVRING_DESC_F_WRITE; + } + + /* indirect->desc[indirect->index].addr */ + writeq(indirect->desc + (16 * indirect->index), data); + /* indirect->desc[indirect->index].len */ + writel(indirect->desc + (16 * indirect->index) + 8, len); + /* indirect->desc[indirect->index].flags */ + writew(indirect->desc + (16 * indirect->index) + 12, flags); + + indirect->index++; +} + uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write, bool next) { @@ -140,6 +185,25 @@ uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write, return vq->free_head++; /* Return and increase, in this order */ } +uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect) +{ + g_assert(vq->indirect); + g_assert_cmpint(vq->size, >=, indirect->elem); + g_assert_cmpint(indirect->index, ==, indirect->elem); + + vq->num_free--; + + /* vq->desc[vq->free_head].addr */ + writeq(vq->desc + (16 * vq->free_head), indirect->desc); + /* vq->desc[vq->free_head].len */ + writel(vq->desc + (16 * vq->free_head) + 8, + sizeof(QVRingDesc) * indirect->elem); + /* vq->desc[vq->free_head].flags */ + writew(vq->desc + (16 * vq->free_head) + 12, QVRING_DESC_F_INDIRECT); + + return vq->free_head++; /* Return and increase, in this order */ +} + void qvirtqueue_kick(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, uint32_t free_head) { diff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h index aba5a1e12c..1860660dfd 100644 --- a/tests/libqos/virtio.h +++ b/tests/libqos/virtio.h @@ -22,6 +22,11 @@ #define QVIRTIO_NET_DEVICE_ID 0x1 #define QVIRTIO_BLK_DEVICE_ID 0x2 +#define QVIRTIO_F_NOTIFY_ON_EMPTY 0x01000000 +#define QVIRTIO_F_ANY_LAYOUT 0x08000000 +#define QVIRTIO_F_RING_INDIRECT_DESC 0x10000000 +#define QVIRTIO_F_RING_EVENT_IDX 0x20000000 + #define QVRING_DESC_F_NEXT 0x1 #define QVRING_DESC_F_WRITE 0x2 #define QVRING_DESC_F_INDIRECT 0x4 @@ -74,8 +79,15 @@ typedef struct QVirtQueue { uint32_t free_head; uint32_t num_free; uint32_t align; + bool indirect; } QVirtQueue; +typedef struct QVRingIndirectDesc { + uint64_t desc; /* This points to an array fo QVRingDesc */ + uint16_t index; + uint16_t elem; +} QVRingIndirectDesc; + typedef struct QVirtioBus { uint8_t (*config_readb)(QVirtioDevice *d, void *addr); uint16_t (*config_readw)(QVirtioDevice *d, void *addr); @@ -85,9 +97,12 @@ typedef struct QVirtioBus { /* Get features of the device */ uint32_t (*get_features)(QVirtioDevice *d); - /* Get features of the device */ + /* Set features of the device */ void (*set_features)(QVirtioDevice *d, uint32_t features); + /* Get features of the guest */ + uint32_t (*get_guest_features)(QVirtioDevice *d); + /* Get status of the device */ uint8_t (*get_status)(QVirtioDevice *d); @@ -144,8 +159,13 @@ QVirtQueue *qvirtqueue_setup(const QVirtioBus *bus, QVirtioDevice *d, QGuestAllocator *alloc, uint16_t index); void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr); +QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d, + QGuestAllocator *alloc, uint16_t elem); +void qvring_indirect_desc_add(QVRingIndirectDesc *indirect, uint64_t data, + uint32_t len, bool write); uint32_t qvirtqueue_add(QVirtQueue *vq, uint64_t data, uint32_t len, bool write, bool next); +uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect); void qvirtqueue_kick(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, uint32_t free_head); diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c index b048938083..2f9cc2b7e7 100644 --- a/tests/virtio-blk-test.c +++ b/tests/virtio-blk-test.c @@ -278,6 +278,105 @@ static void pci_basic(void) test_end(); } +static void pci_indirect(void) +{ + QVirtioPCIDevice *dev; + QPCIBus *bus; + QVirtQueue *vq; + QGuestAllocator *alloc; + QVirtioBlkReq req; + QVRingIndirectDesc *indirect; + void *addr; + uint64_t req_addr; + uint64_t capacity; + uint32_t features; + uint32_t free_head; + uint8_t status; + char *data; + + bus = test_start(); + + dev = virtio_blk_init(bus); + + /* MSI-X is not enabled */ + addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_NO_MSIX; + + capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr); + g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512); + + features = qvirtio_get_features(&qvirtio_pci, &dev->vdev); + g_assert_cmphex(features & QVIRTIO_F_RING_INDIRECT_DESC, !=, 0); + features = features & ~(QVIRTIO_F_BAD_FEATURE | QVIRTIO_F_RING_EVENT_IDX | + QVIRTIO_BLK_F_SCSI); + qvirtio_set_features(&qvirtio_pci, &dev->vdev, features); + + alloc = pc_alloc_init(); + vq = qvirtqueue_setup(&qvirtio_pci, &dev->vdev, alloc, 0); + + qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev); + + /* Write request */ + req.type = QVIRTIO_BLK_T_OUT; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + indirect = qvring_indirect_desc_setup(&dev->vdev, alloc, 2); + qvring_indirect_desc_add(indirect, req_addr, 528, false); + qvring_indirect_desc_add(indirect, req_addr + 528, 1, true); + free_head = qvirtqueue_add_indirect(vq, indirect); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + + g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + QVIRTIO_BLK_TIMEOUT)); + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + g_free(indirect); + guest_free(alloc, req_addr); + + /* Read request */ + req.type = QVIRTIO_BLK_T_IN; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + indirect = qvring_indirect_desc_setup(&dev->vdev, alloc, 2); + qvring_indirect_desc_add(indirect, req_addr, 16, false); + qvring_indirect_desc_add(indirect, req_addr + 16, 513, true); + free_head = qvirtqueue_add_indirect(vq, indirect); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + + g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + QVIRTIO_BLK_TIMEOUT)); + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + data = g_malloc0(512); + memread(req_addr + 16, data, 512); + g_assert_cmpstr(data, ==, "TEST"); + g_free(data); + + g_free(indirect); + guest_free(alloc, req_addr); + + /* End test */ + guest_free(alloc, vq->desc); + qvirtio_pci_device_disable(dev); + g_free(dev); + test_end(); +} + int main(int argc, char **argv) { int ret; @@ -285,6 +384,7 @@ int main(int argc, char **argv) g_test_init(&argc, &argv, NULL); g_test_add_func("/virtio/blk/pci/basic", pci_basic); + g_test_add_func("/virtio/blk/pci/indirect", pci_indirect); ret = g_test_run(); -- cgit 1.4.1 From 58368113989403775496b3422f22094713703157 Mon Sep 17 00:00:00 2001 From: Marc Marí Date: Mon, 1 Sep 2014 12:07:59 +0200 Subject: libqos: Added MSI-X support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Added MSI-X support for qtest PCI. Added MSI-X support for virtio-pci. Added MSI-X test case in virtio-blk-test. Signed-off-by: Marc Marí Signed-off-by: Stefan Hajnoczi --- tests/libqos/pci.c | 111 +++++++++++++++++++++++++++- tests/libqos/pci.h | 10 +++ tests/libqos/virtio-pci.c | 142 +++++++++++++++++++++++++++++++----- tests/libqos/virtio-pci.h | 17 +++++ tests/libqos/virtio.c | 17 ++++- tests/libqos/virtio.h | 11 ++- tests/virtio-blk-test.c | 180 ++++++++++++++++++++++++++++++++++++---------- 7 files changed, 426 insertions(+), 62 deletions(-) (limited to 'tests/libqos/virtio.c') diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c index ce0b308a83..d5ce683d77 100644 --- a/tests/libqos/pci.c +++ b/tests/libqos/pci.c @@ -15,8 +15,6 @@ #include "hw/pci/pci_regs.h" #include -#include - void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, void (*func)(QPCIDevice *dev, int devfn, void *data), void *data) @@ -75,6 +73,115 @@ void qpci_device_enable(QPCIDevice *dev) qpci_config_writew(dev, PCI_COMMAND, cmd); } +uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id) +{ + uint8_t cap; + uint8_t addr = qpci_config_readb(dev, PCI_CAPABILITY_LIST); + + do { + cap = qpci_config_readb(dev, addr); + if (cap != id) { + addr = qpci_config_readb(dev, addr + PCI_CAP_LIST_NEXT); + } + } while (cap != id && addr != 0); + + return addr; +} + +void qpci_msix_enable(QPCIDevice *dev) +{ + uint8_t addr; + uint16_t val; + uint32_t table; + uint8_t bir_table; + uint8_t bir_pba; + void *offset; + + addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX); + g_assert_cmphex(addr, !=, 0); + + val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); + qpci_config_writew(dev, addr + PCI_MSIX_FLAGS, val | PCI_MSIX_FLAGS_ENABLE); + + table = qpci_config_readl(dev, addr + PCI_MSIX_TABLE); + bir_table = table & PCI_MSIX_FLAGS_BIRMASK; + offset = qpci_iomap(dev, bir_table, NULL); + dev->msix_table = offset + (table & ~PCI_MSIX_FLAGS_BIRMASK); + + table = qpci_config_readl(dev, addr + PCI_MSIX_PBA); + bir_pba = table & PCI_MSIX_FLAGS_BIRMASK; + if (bir_pba != bir_table) { + offset = qpci_iomap(dev, bir_pba, NULL); + } + dev->msix_pba = offset + (table & ~PCI_MSIX_FLAGS_BIRMASK); + + g_assert(dev->msix_table != NULL); + g_assert(dev->msix_pba != NULL); + dev->msix_enabled = true; +} + +void qpci_msix_disable(QPCIDevice *dev) +{ + uint8_t addr; + uint16_t val; + + g_assert(dev->msix_enabled); + addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX); + g_assert_cmphex(addr, !=, 0); + val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); + qpci_config_writew(dev, addr + PCI_MSIX_FLAGS, + val & ~PCI_MSIX_FLAGS_ENABLE); + + qpci_iounmap(dev, dev->msix_table); + qpci_iounmap(dev, dev->msix_pba); + dev->msix_enabled = 0; + dev->msix_table = NULL; + dev->msix_pba = NULL; +} + +bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry) +{ + uint32_t pba_entry; + uint8_t bit_n = entry % 32; + void *addr = dev->msix_pba + (entry / 32) * PCI_MSIX_ENTRY_SIZE / 4; + + g_assert(dev->msix_enabled); + pba_entry = qpci_io_readl(dev, addr); + qpci_io_writel(dev, addr, pba_entry & ~(1 << bit_n)); + return (pba_entry & (1 << bit_n)) != 0; +} + +bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry) +{ + uint8_t addr; + uint16_t val; + void *vector_addr = dev->msix_table + (entry * PCI_MSIX_ENTRY_SIZE); + + g_assert(dev->msix_enabled); + addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX); + g_assert_cmphex(addr, !=, 0); + val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); + + if (val & PCI_MSIX_FLAGS_MASKALL) { + return true; + } else { + return (qpci_io_readl(dev, vector_addr + PCI_MSIX_ENTRY_VECTOR_CTRL) + & PCI_MSIX_ENTRY_CTRL_MASKBIT) != 0; + } +} + +uint16_t qpci_msix_table_size(QPCIDevice *dev) +{ + uint8_t addr; + uint16_t control; + + addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX); + g_assert_cmphex(addr, !=, 0); + + control = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS); + return (control & PCI_MSIX_FLAGS_QSIZE) + 1; +} + uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset) { return dev->bus->config_readb(dev->bus, dev->devfn, offset); diff --git a/tests/libqos/pci.h b/tests/libqos/pci.h index 9ee048b154..d51eb9e219 100644 --- a/tests/libqos/pci.h +++ b/tests/libqos/pci.h @@ -14,6 +14,7 @@ #define LIBQOS_PCI_H #include +#include "libqtest.h" #define QPCI_DEVFN(dev, fn) (((dev) << 3) | (fn)) @@ -49,6 +50,9 @@ struct QPCIDevice { QPCIBus *bus; int devfn; + bool msix_enabled; + void *msix_table; + void *msix_pba; }; void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, @@ -57,6 +61,12 @@ void qpci_device_foreach(QPCIBus *bus, int vendor_id, int device_id, QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn); void qpci_device_enable(QPCIDevice *dev); +uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id); +void qpci_msix_enable(QPCIDevice *dev); +void qpci_msix_disable(QPCIDevice *dev); +bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry); +bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry); +uint16_t qpci_msix_table_size(QPCIDevice *dev); uint8_t qpci_config_readb(QPCIDevice *dev, uint8_t offset); uint16_t qpci_config_readw(QPCIDevice *dev, uint8_t offset); diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c index cf15f7a45b..ab28717305 100644 --- a/tests/libqos/virtio-pci.c +++ b/tests/libqos/virtio-pci.c @@ -36,6 +36,8 @@ static QVirtioPCIDevice *qpcidevice_to_qvirtiodevice(QPCIDevice *pdev) qpci_config_readw(vpcidev->pdev, PCI_SUBSYSTEM_ID); } + vpcidev->config_msix_entry = -1; + return vpcidev; } @@ -125,10 +127,45 @@ static void qvirtio_pci_set_status(QVirtioDevice *d, uint8_t status) qpci_io_writeb(dev->pdev, dev->addr + QVIRTIO_DEVICE_STATUS, status); } -static uint8_t qvirtio_pci_get_isr_status(QVirtioDevice *d) +static bool qvirtio_pci_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq) { QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; - return qpci_io_readb(dev->pdev, dev->addr + QVIRTIO_ISR_STATUS); + QVirtQueuePCI *vqpci = (QVirtQueuePCI *)vq; + uint32_t data; + + if (dev->pdev->msix_enabled) { + g_assert_cmpint(vqpci->msix_entry, !=, -1); + if (qpci_msix_masked(dev->pdev, vqpci->msix_entry)) { + /* No ISR checking should be done if masked, but read anyway */ + return qpci_msix_pending(dev->pdev, vqpci->msix_entry); + } else { + data = readl(vqpci->msix_addr); + writel(vqpci->msix_addr, 0); + return data == vqpci->msix_data; + } + } else { + return qpci_io_readb(dev->pdev, dev->addr + QVIRTIO_ISR_STATUS) & 1; + } +} + +static bool qvirtio_pci_get_config_isr_status(QVirtioDevice *d) +{ + QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d; + uint32_t data; + + if (dev->pdev->msix_enabled) { + g_assert_cmpint(dev->config_msix_entry, !=, -1); + if (qpci_msix_masked(dev->pdev, dev->config_msix_entry)) { + /* No ISR checking should be done if masked, but read anyway */ + return qpci_msix_pending(dev->pdev, dev->config_msix_entry); + } else { + data = readl(dev->config_msix_addr); + writel(dev->config_msix_addr, 0); + return data == dev->config_msix_data; + } + } else { + return qpci_io_readb(dev->pdev, dev->addr + QVIRTIO_ISR_STATUS) & 2; + } } static void qvirtio_pci_queue_select(QVirtioDevice *d, uint16_t index) @@ -154,32 +191,34 @@ static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d, { uint32_t feat; uint64_t addr; - QVirtQueue *vq; + QVirtQueuePCI *vqpci; - vq = g_malloc0(sizeof(*vq)); + vqpci = g_malloc0(sizeof(*vqpci)); feat = qvirtio_pci_get_guest_features(d); qvirtio_pci_queue_select(d, index); - vq->index = index; - vq->size = qvirtio_pci_get_queue_size(d); - vq->free_head = 0; - vq->num_free = vq->size; - vq->align = QVIRTIO_PCI_ALIGN; - vq->indirect = (feat & QVIRTIO_F_RING_INDIRECT_DESC) != 0; + vqpci->vq.index = index; + vqpci->vq.size = qvirtio_pci_get_queue_size(d); + vqpci->vq.free_head = 0; + vqpci->vq.num_free = vqpci->vq.size; + vqpci->vq.align = QVIRTIO_PCI_ALIGN; + vqpci->vq.indirect = (feat & QVIRTIO_F_RING_INDIRECT_DESC) != 0; + + vqpci->msix_entry = -1; + vqpci->msix_addr = 0; + vqpci->msix_data = 0x12345678; /* Check different than 0 */ - g_assert_cmpint(vq->size, !=, 0); + g_assert_cmpint(vqpci->vq.size, !=, 0); /* Check power of 2 */ - g_assert_cmpint(vq->size & (vq->size - 1), ==, 0); - - addr = guest_alloc(alloc, qvring_size(vq->size, QVIRTIO_PCI_ALIGN)); - qvring_init(alloc, vq, addr); - qvirtio_pci_set_queue_address(d, vq->desc / QVIRTIO_PCI_ALIGN); + g_assert_cmpint(vqpci->vq.size & (vqpci->vq.size - 1), ==, 0); - /* TODO: MSI-X configuration */ + addr = guest_alloc(alloc, qvring_size(vqpci->vq.size, QVIRTIO_PCI_ALIGN)); + qvring_init(alloc, &vqpci->vq, addr); + qvirtio_pci_set_queue_address(d, vqpci->vq.desc / QVIRTIO_PCI_ALIGN); - return vq; + return &vqpci->vq; } static void qvirtio_pci_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq) @@ -198,7 +237,8 @@ const QVirtioBus qvirtio_pci = { .get_guest_features = qvirtio_pci_get_guest_features, .get_status = qvirtio_pci_get_status, .set_status = qvirtio_pci_set_status, - .get_isr_status = qvirtio_pci_get_isr_status, + .get_queue_isr_status = qvirtio_pci_get_queue_isr_status, + .get_config_isr_status = qvirtio_pci_get_config_isr_status, .queue_select = qvirtio_pci_queue_select, .get_queue_size = qvirtio_pci_get_queue_size, .set_queue_address = qvirtio_pci_set_queue_address, @@ -235,4 +275,68 @@ void qvirtio_pci_device_enable(QVirtioPCIDevice *d) void qvirtio_pci_device_disable(QVirtioPCIDevice *d) { qpci_iounmap(d->pdev, d->addr); + d->addr = NULL; +} + +void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci, + QGuestAllocator *alloc, uint16_t entry) +{ + uint16_t vector; + uint32_t control; + void *addr; + + g_assert(d->pdev->msix_enabled); + addr = d->pdev->msix_table + (entry * 16); + + g_assert_cmpint(entry, >=, 0); + g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev)); + vqpci->msix_entry = entry; + + vqpci->msix_addr = guest_alloc(alloc, 4); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_LOWER_ADDR, + vqpci->msix_addr & ~0UL); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_UPPER_ADDR, + (vqpci->msix_addr >> 32) & ~0UL); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_DATA, vqpci->msix_data); + + control = qpci_io_readl(d->pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL, + control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); + + qvirtio_pci_queue_select(&d->vdev, vqpci->vq.index); + qpci_io_writew(d->pdev, d->addr + QVIRTIO_MSIX_QUEUE_VECTOR, entry); + vector = qpci_io_readw(d->pdev, d->addr + QVIRTIO_MSIX_QUEUE_VECTOR); + g_assert_cmphex(vector, !=, QVIRTIO_MSI_NO_VECTOR); +} + +void qvirtio_pci_set_msix_configuration_vector(QVirtioPCIDevice *d, + QGuestAllocator *alloc, uint16_t entry) +{ + uint16_t vector; + uint32_t control; + void *addr; + + g_assert(d->pdev->msix_enabled); + addr = d->pdev->msix_table + (entry * 16); + + g_assert_cmpint(entry, >=, 0); + g_assert_cmpint(entry, <, qpci_msix_table_size(d->pdev)); + d->config_msix_entry = entry; + + d->config_msix_data = 0x12345678; + d->config_msix_addr = guest_alloc(alloc, 4); + + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_LOWER_ADDR, + d->config_msix_addr & ~0UL); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_UPPER_ADDR, + (d->config_msix_addr >> 32) & ~0UL); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_DATA, d->config_msix_data); + + control = qpci_io_readl(d->pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL); + qpci_io_writel(d->pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL, + control & ~PCI_MSIX_ENTRY_CTRL_MASKBIT); + + qpci_io_writew(d->pdev, d->addr + QVIRTIO_MSIX_CONF_VECTOR, entry); + vector = qpci_io_readw(d->pdev, d->addr + QVIRTIO_MSIX_CONF_VECTOR); + g_assert_cmphex(vector, !=, QVIRTIO_MSI_NO_VECTOR); } diff --git a/tests/libqos/virtio-pci.h b/tests/libqos/virtio-pci.h index 40bd12db13..883f7ff267 100644 --- a/tests/libqos/virtio-pci.h +++ b/tests/libqos/virtio-pci.h @@ -28,12 +28,24 @@ #define QVIRTIO_PCI_ALIGN 4096 +#define QVIRTIO_MSI_NO_VECTOR 0xFFFF + typedef struct QVirtioPCIDevice { QVirtioDevice vdev; QPCIDevice *pdev; void *addr; + uint16_t config_msix_entry; + uint64_t config_msix_addr; + uint32_t config_msix_data; } QVirtioPCIDevice; +typedef struct QVirtQueuePCI { + QVirtQueue vq; + uint16_t msix_entry; + uint64_t msix_addr; + uint32_t msix_data; +} QVirtQueuePCI; + extern const QVirtioBus qvirtio_pci; void qvirtio_pci_foreach(QPCIBus *bus, uint16_t device_type, @@ -41,4 +53,9 @@ void qvirtio_pci_foreach(QPCIBus *bus, uint16_t device_type, QVirtioPCIDevice *qvirtio_pci_device_find(QPCIBus *bus, uint16_t device_type); void qvirtio_pci_device_enable(QVirtioPCIDevice *d); void qvirtio_pci_device_disable(QVirtioPCIDevice *d); + +void qvirtio_pci_set_msix_configuration_vector(QVirtioPCIDevice *d, + QGuestAllocator *alloc, uint16_t entry); +void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d, QVirtQueuePCI *vqpci, + QGuestAllocator *alloc, uint16_t entry); #endif diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c index b1cab1f699..16eaf79425 100644 --- a/tests/libqos/virtio.c +++ b/tests/libqos/virtio.c @@ -78,12 +78,25 @@ void qvirtio_set_driver_ok(const QVirtioBus *bus, QVirtioDevice *d) QVIRTIO_DRIVER_OK | QVIRTIO_DRIVER | QVIRTIO_ACKNOWLEDGE); } -bool qvirtio_wait_isr(const QVirtioBus *bus, QVirtioDevice *d, uint8_t mask, +bool qvirtio_wait_queue_isr(const QVirtioBus *bus, QVirtioDevice *d, + QVirtQueue *vq, uint64_t timeout) +{ + do { + clock_step(10); + if (bus->get_queue_isr_status(d, vq)) { + break; /* It has ended */ + } + } while (--timeout); + + return timeout != 0; +} + +bool qvirtio_wait_config_isr(const QVirtioBus *bus, QVirtioDevice *d, uint64_t timeout) { do { clock_step(10); - if (bus->get_isr_status(d) & mask) { + if (bus->get_config_isr_status(d)) { break; /* It has ended */ } } while (--timeout); diff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h index 1860660dfd..cebccd21d1 100644 --- a/tests/libqos/virtio.h +++ b/tests/libqos/virtio.h @@ -109,8 +109,11 @@ typedef struct QVirtioBus { /* Set status of the device */ void (*set_status)(QVirtioDevice *d, uint8_t status); - /* Get the ISR status of the device */ - uint8_t (*get_isr_status)(QVirtioDevice *d); + /* Get the queue ISR status of the device */ + bool (*get_queue_isr_status)(QVirtioDevice *d, QVirtQueue *vq); + + /* Get the configuration ISR status of the device */ + bool (*get_config_isr_status)(QVirtioDevice *d); /* Select a queue to work on */ void (*queue_select)(QVirtioDevice *d, uint16_t index); @@ -153,7 +156,9 @@ void qvirtio_set_acknowledge(const QVirtioBus *bus, QVirtioDevice *d); void qvirtio_set_driver(const QVirtioBus *bus, QVirtioDevice *d); void qvirtio_set_driver_ok(const QVirtioBus *bus, QVirtioDevice *d); -bool qvirtio_wait_isr(const QVirtioBus *bus, QVirtioDevice *d, uint8_t mask, +bool qvirtio_wait_queue_isr(const QVirtioBus *bus, QVirtioDevice *d, + QVirtQueue *vq, uint64_t timeout); +bool qvirtio_wait_config_isr(const QVirtioBus *bus, QVirtioDevice *d, uint64_t timeout); QVirtQueue *qvirtqueue_setup(const QVirtioBus *bus, QVirtioDevice *d, QGuestAllocator *alloc, uint16_t index); diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c index 672580b206..0100aaa950 100644 --- a/tests/virtio-blk-test.c +++ b/tests/virtio-blk-test.c @@ -134,7 +134,7 @@ static void pci_basic(void) { QVirtioPCIDevice *dev; QPCIBus *bus; - QVirtQueue *vq; + QVirtQueuePCI *vqpci; QGuestAllocator *alloc; QVirtioBlkReq req; void *addr; @@ -162,7 +162,8 @@ static void pci_basic(void) qvirtio_set_features(&qvirtio_pci, &dev->vdev, features); alloc = pc_alloc_init(); - vq = qvirtqueue_setup(&qvirtio_pci, &dev->vdev, alloc, 0); + vqpci = (QVirtQueuePCI *)qvirtqueue_setup(&qvirtio_pci, &dev->vdev, + alloc, 0); qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev); @@ -178,11 +179,11 @@ static void pci_basic(void) g_free(req.data); - free_head = qvirtqueue_add(vq, req_addr, 528, false, true); - qvirtqueue_add(vq, req_addr + 528, 1, true, false); - qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 528, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); status = readb(req_addr + 528); g_assert_cmpint(status, ==, 0); @@ -199,12 +200,12 @@ static void pci_basic(void) g_free(req.data); - free_head = qvirtqueue_add(vq, req_addr, 16, false, true); - qvirtqueue_add(vq, req_addr + 16, 513, true, false); + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 16, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 16, 513, true, false); - qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); status = readb(req_addr + 528); g_assert_cmpint(status, ==, 0); @@ -226,15 +227,13 @@ static void pci_basic(void) req_addr = virtio_blk_request(alloc, &req, 512); - g_free(req.data); - - free_head = qvirtqueue_add(vq, req_addr, 16, false, true); - qvirtqueue_add(vq, req_addr + 16, 512, false, true); - qvirtqueue_add(vq, req_addr + 528, 1, true, false); + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 16, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 16, 512, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false); - qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); status = readb(req_addr + 528); g_assert_cmpint(status, ==, 0); @@ -251,19 +250,17 @@ static void pci_basic(void) g_free(req.data); - free_head = qvirtqueue_add(vq, req_addr, 16, false, true); - qvirtqueue_add(vq, req_addr + 16, 512, true, true); - qvirtqueue_add(vq, req_addr + 528, 1, true, false); + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 16, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 16, 512, true, true); + qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false); - qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); status = readb(req_addr + 528); g_assert_cmpint(status, ==, 0); - guest_free(alloc, req_addr); - data = g_malloc0(512); memread(req_addr + 16, data, 512); g_assert_cmpstr(data, ==, "TEST"); @@ -272,7 +269,7 @@ static void pci_basic(void) guest_free(alloc, req_addr); /* End test */ - guest_free(alloc, vq->desc); + guest_free(alloc, vqpci->vq.desc); qvirtio_pci_device_disable(dev); g_free(dev); test_end(); @@ -282,7 +279,7 @@ static void pci_indirect(void) { QVirtioPCIDevice *dev; QPCIBus *bus; - QVirtQueue *vq; + QVirtQueuePCI *vqpci; QGuestAllocator *alloc; QVirtioBlkReq req; QVRingIndirectDesc *indirect; @@ -311,8 +308,8 @@ static void pci_indirect(void) qvirtio_set_features(&qvirtio_pci, &dev->vdev, features); alloc = pc_alloc_init(); - vq = qvirtqueue_setup(&qvirtio_pci, &dev->vdev, alloc, 0); - + vqpci = (QVirtQueuePCI *)qvirtqueue_setup(&qvirtio_pci, &dev->vdev, + alloc, 0); qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev); /* Write request */ @@ -329,10 +326,10 @@ static void pci_indirect(void) indirect = qvring_indirect_desc_setup(&dev->vdev, alloc, 2); qvring_indirect_desc_add(indirect, req_addr, 528, false); qvring_indirect_desc_add(indirect, req_addr + 528, 1, true); - free_head = qvirtqueue_add_indirect(vq, indirect); - qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + free_head = qvirtqueue_add_indirect(&vqpci->vq, indirect); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); status = readb(req_addr + 528); g_assert_cmpint(status, ==, 0); @@ -354,10 +351,10 @@ static void pci_indirect(void) indirect = qvring_indirect_desc_setup(&dev->vdev, alloc, 2); qvring_indirect_desc_add(indirect, req_addr, 16, false); qvring_indirect_desc_add(indirect, req_addr + 16, 513, true); - free_head = qvirtqueue_add_indirect(vq, indirect); - qvirtqueue_kick(&qvirtio_pci, &dev->vdev, vq, free_head); + free_head = qvirtqueue_add_indirect(&vqpci->vq, indirect); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x1, + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); status = readb(req_addr + 528); g_assert_cmpint(status, ==, 0); @@ -371,7 +368,7 @@ static void pci_indirect(void) guest_free(alloc, req_addr); /* End test */ - guest_free(alloc, vq->desc); + guest_free(alloc, vqpci->vq.desc); qvirtio_pci_device_disable(dev); g_free(dev); test_end(); @@ -399,7 +396,7 @@ static void pci_config(void) qmp("{ 'execute': 'block_resize', 'arguments': { 'device': 'drive0', " " 'size': %d } }", n_size); - g_assert(qvirtio_wait_isr(&qvirtio_pci, &dev->vdev, 0x2, + g_assert(qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev, QVIRTIO_BLK_TIMEOUT)); capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr); @@ -410,6 +407,116 @@ static void pci_config(void) test_end(); } +static void pci_msix(void) +{ + QVirtioPCIDevice *dev; + QPCIBus *bus; + QVirtQueuePCI *vqpci; + QGuestAllocator *alloc; + QVirtioBlkReq req; + int n_size = TEST_IMAGE_SIZE / 2; + void *addr; + uint64_t req_addr; + uint64_t capacity; + uint32_t features; + uint32_t free_head; + uint8_t status; + char *data; + + bus = test_start(); + alloc = pc_alloc_init(); + + dev = virtio_blk_init(bus); + qpci_msix_enable(dev->pdev); + + qvirtio_pci_set_msix_configuration_vector(dev, alloc, 0); + + /* MSI-X is enabled */ + addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_MSIX; + + capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr); + g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512); + + features = qvirtio_get_features(&qvirtio_pci, &dev->vdev); + features = features & ~(QVIRTIO_F_BAD_FEATURE | + QVIRTIO_F_RING_INDIRECT_DESC | + QVIRTIO_F_RING_EVENT_IDX | QVIRTIO_BLK_F_SCSI); + qvirtio_set_features(&qvirtio_pci, &dev->vdev, features); + + vqpci = (QVirtQueuePCI *)qvirtqueue_setup(&qvirtio_pci, &dev->vdev, + alloc, 0); + qvirtqueue_pci_msix_setup(dev, vqpci, alloc, 1); + + qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev); + + qmp("{ 'execute': 'block_resize', 'arguments': { 'device': 'drive0', " + " 'size': %d } }", n_size); + + g_assert(qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev, + QVIRTIO_BLK_TIMEOUT)); + + capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr); + g_assert_cmpint(capacity, ==, n_size / 512); + + /* Write request */ + req.type = QVIRTIO_BLK_T_OUT; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 528, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); + + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, + QVIRTIO_BLK_TIMEOUT)); + + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + guest_free(alloc, req_addr); + + /* Read request */ + req.type = QVIRTIO_BLK_T_IN; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 16, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 16, 513, true, false); + + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); + + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, + QVIRTIO_BLK_TIMEOUT)); + + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + data = g_malloc0(512); + memread(req_addr + 16, data, 512); + g_assert_cmpstr(data, ==, "TEST"); + g_free(data); + + guest_free(alloc, req_addr); + + /* End test */ + guest_free(alloc, vqpci->vq.desc); + qpci_msix_disable(dev->pdev); + qvirtio_pci_device_disable(dev); + g_free(dev); + test_end(); +} + int main(int argc, char **argv) { int ret; @@ -419,6 +526,7 @@ int main(int argc, char **argv) g_test_add_func("/virtio/blk/pci/basic", pci_basic); g_test_add_func("/virtio/blk/pci/indirect", pci_indirect); g_test_add_func("/virtio/blk/pci/config", pci_config); + g_test_add_func("/virtio/blk/pci/msix", pci_msix); ret = g_test_run(); -- cgit 1.4.1 From 1053587c3fb50fb78e18a2e32b90e272c1796de0 Mon Sep 17 00:00:00 2001 From: Marc Marí Date: Mon, 1 Sep 2014 12:08:00 +0200 Subject: libqos: Added EVENT_IDX support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Added avail_event and NO_NOTIFY check before notifying. Added used_event setting. Signed-off-by: Marc Marí Signed-off-by: Stefan Hajnoczi --- tests/libqos/virtio-pci.c | 1 + tests/libqos/virtio.c | 27 +++++++++- tests/libqos/virtio.h | 5 ++ tests/virtio-blk-test.c | 124 ++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 156 insertions(+), 1 deletion(-) (limited to 'tests/libqos/virtio.c') diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c index ab28717305..788ebaff46 100644 --- a/tests/libqos/virtio-pci.c +++ b/tests/libqos/virtio-pci.c @@ -203,6 +203,7 @@ static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d, vqpci->vq.num_free = vqpci->vq.size; vqpci->vq.align = QVIRTIO_PCI_ALIGN; vqpci->vq.indirect = (feat & QVIRTIO_F_RING_INDIRECT_DESC) != 0; + vqpci->vq.event = (feat & QVIRTIO_F_RING_EVENT_IDX) != 0; vqpci->msix_entry = -1; vqpci->msix_addr = 0; diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c index 16eaf79425..128dbd0e9a 100644 --- a/tests/libqos/virtio.c +++ b/tests/libqos/virtio.c @@ -124,9 +124,13 @@ void qvring_init(const QGuestAllocator *alloc, QVirtQueue *vq, uint64_t addr) writew(vq->avail, 0); /* vq->avail->idx */ writew(vq->avail + 2, 0); + /* vq->avail->used_event */ + writew(vq->avail + 4 + (2 * vq->size), 0); /* vq->used->flags */ writew(vq->used, 0); + /* vq->used->avail_event */ + writew(vq->used+2+(sizeof(struct QVRingUsedElem)*vq->size), 0); } QVRingIndirectDesc *qvring_indirect_desc_setup(QVirtioDevice *d, @@ -222,11 +226,32 @@ void qvirtqueue_kick(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, { /* vq->avail->idx */ uint16_t idx = readl(vq->avail + 2); + /* vq->used->flags */ + uint16_t flags; + /* vq->used->avail_event */ + uint16_t avail_event; /* vq->avail->ring[idx % vq->size] */ writel(vq->avail + 4 + (2 * (idx % vq->size)), free_head); /* vq->avail->idx */ writel(vq->avail + 2, idx + 1); - bus->virtqueue_kick(d, vq); + /* Must read after idx is updated */ + flags = readw(vq->avail); + avail_event = readw(vq->used + 4 + + (sizeof(struct QVRingUsedElem) * vq->size)); + + /* < 1 because we add elements to avail queue one by one */ + if ((flags & QVRING_USED_F_NO_NOTIFY) == 0 && + (!vq->event || (uint16_t)(idx-avail_event) < 1)) { + bus->virtqueue_kick(d, vq); + } +} + +void qvirtqueue_set_used_event(QVirtQueue *vq, uint16_t idx) +{ + g_assert(vq->event); + + /* vq->avail->used_event */ + writew(vq->avail + 4 + (2 * vq->size), idx); } diff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h index cebccd21d1..70b3376360 100644 --- a/tests/libqos/virtio.h +++ b/tests/libqos/virtio.h @@ -26,6 +26,7 @@ #define QVIRTIO_F_ANY_LAYOUT 0x08000000 #define QVIRTIO_F_RING_INDIRECT_DESC 0x10000000 #define QVIRTIO_F_RING_EVENT_IDX 0x20000000 +#define QVIRTIO_F_BAD_FEATURE 0x40000000 #define QVRING_DESC_F_NEXT 0x1 #define QVRING_DESC_F_WRITE 0x2 @@ -57,6 +58,7 @@ typedef struct QVRingAvail { uint16_t flags; uint16_t idx; uint16_t ring[0]; /* This is an array of uint16_t */ + uint16_t used_event; } QVRingAvail; typedef struct QVRingUsedElem { @@ -68,6 +70,7 @@ typedef struct QVRingUsed { uint16_t flags; uint16_t idx; QVRingUsedElem ring[0]; /* This is an array of QVRingUsedElem structs */ + uint16_t avail_event; } QVRingUsed; typedef struct QVirtQueue { @@ -80,6 +83,7 @@ typedef struct QVirtQueue { uint32_t num_free; uint32_t align; bool indirect; + bool event; } QVirtQueue; typedef struct QVRingIndirectDesc { @@ -174,4 +178,5 @@ uint32_t qvirtqueue_add_indirect(QVirtQueue *vq, QVRingIndirectDesc *indirect); void qvirtqueue_kick(const QVirtioBus *bus, QVirtioDevice *d, QVirtQueue *vq, uint32_t free_head); +void qvirtqueue_set_used_event(QVirtQueue *vq, uint16_t idx); #endif diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c index 0100aaa950..588666cff1 100644 --- a/tests/virtio-blk-test.c +++ b/tests/virtio-blk-test.c @@ -496,6 +496,129 @@ static void pci_msix(void) qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); + + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, + QVIRTIO_BLK_TIMEOUT)); + + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + data = g_malloc0(512); + memread(req_addr + 16, data, 512); + g_assert_cmpstr(data, ==, "TEST"); + g_free(data); + + guest_free(alloc, req_addr); + + /* End test */ + guest_free(alloc, (uint64_t)vqpci->vq.desc); + qpci_msix_disable(dev->pdev); + qvirtio_pci_device_disable(dev); + g_free(dev); + test_end(); +} + +static void pci_idx(void) +{ + QVirtioPCIDevice *dev; + QPCIBus *bus; + QVirtQueuePCI *vqpci; + QGuestAllocator *alloc; + QVirtioBlkReq req; + void *addr; + uint64_t req_addr; + uint64_t capacity; + uint32_t features; + uint32_t free_head; + uint8_t status; + char *data; + + bus = test_start(); + alloc = pc_alloc_init(); + + dev = virtio_blk_init(bus); + qpci_msix_enable(dev->pdev); + + qvirtio_pci_set_msix_configuration_vector(dev, alloc, 0); + + /* MSI-X is enabled */ + addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_MSIX; + + capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr); + g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512); + + features = qvirtio_get_features(&qvirtio_pci, &dev->vdev); + features = features & ~(QVIRTIO_F_BAD_FEATURE | + QVIRTIO_F_RING_INDIRECT_DESC | + QVIRTIO_F_NOTIFY_ON_EMPTY | QVIRTIO_BLK_F_SCSI); + qvirtio_set_features(&qvirtio_pci, &dev->vdev, features); + + vqpci = (QVirtQueuePCI *)qvirtqueue_setup(&qvirtio_pci, &dev->vdev, + alloc, 0); + qvirtqueue_pci_msix_setup(dev, vqpci, alloc, 1); + + qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev); + + /* Write request */ + req.type = QVIRTIO_BLK_T_OUT; + req.ioprio = 1; + req.sector = 0; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 528, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); + + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, + QVIRTIO_BLK_TIMEOUT)); + + /* Write request */ + req.type = QVIRTIO_BLK_T_OUT; + req.ioprio = 1; + req.sector = 1; + req.data = g_malloc0(512); + strcpy(req.data, "TEST"); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + /* Notify after processing the third request */ + qvirtqueue_set_used_event(&vqpci->vq, 2); + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 528, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 528, 1, true, false); + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); + + /* No notification expected */ + g_assert(!qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, + QVIRTIO_BLK_TIMEOUT)); + + status = readb(req_addr + 528); + g_assert_cmpint(status, ==, 0); + + guest_free(alloc, req_addr); + + /* Read request */ + req.type = QVIRTIO_BLK_T_IN; + req.ioprio = 1; + req.sector = 1; + req.data = g_malloc0(512); + + req_addr = virtio_blk_request(alloc, &req, 512); + + g_free(req.data); + + free_head = qvirtqueue_add(&vqpci->vq, req_addr, 16, false, true); + qvirtqueue_add(&vqpci->vq, req_addr + 16, 513, true, false); + + qvirtqueue_kick(&qvirtio_pci, &dev->vdev, &vqpci->vq, free_head); + + g_assert(qvirtio_wait_queue_isr(&qvirtio_pci, &dev->vdev, &vqpci->vq, QVIRTIO_BLK_TIMEOUT)); @@ -527,6 +650,7 @@ int main(int argc, char **argv) g_test_add_func("/virtio/blk/pci/indirect", pci_indirect); g_test_add_func("/virtio/blk/pci/config", pci_config); g_test_add_func("/virtio/blk/pci/msix", pci_msix); + g_test_add_func("/virtio/blk/pci/idx", pci_idx); ret = g_test_run(); -- cgit 1.4.1