diff options
| author | Theofilos Augoustis <theofilos.augoustis@gmail.com> | 2023-11-26 11:56:49 +0100 |
|---|---|---|
| committer | Theofilos Augoustis <theofilos.augoustis@gmail.com> | 2023-11-26 11:56:49 +0100 |
| commit | 47894bb5d2e425f28d992aee6331b89b85b2058d (patch) | |
| tree | fd08c28c447fbb95e9d8d4122514227f9a48d0ad /arch/arch.py | |
| parent | a4bf627c2440cbea392e27f138b07fa22cd9e6f1 (diff) | |
| download | focaccia-47894bb5d2e425f28d992aee6331b89b85b2058d.tar.gz focaccia-47894bb5d2e425f28d992aee6331b89b85b2058d.zip | |
Standardize X86 register names
Add some infrastructure for flexible register name matching (i.e. using 'PC' to look up RIP): - `Arch.to_regname` tries to look up a register's standard name from an arbitrary string. - `ArchX86` overrides `to_regname` to resolve alias names for registers. Currently just 'PC' for 'RIP'. - `ProgramState.read` and `ProgramState.write` use `to_regname` to make register access more convenient. Add all flags with their standard abbreviations to `x86.regnames`. Implement a full RFLAGS decomposition into its individual flags in `x86`. Replace the hacks in `run.py` and `miasm_test.py` with this more complete solution. Co-authored-by: Theofilos Augoustis <theofilos.augoustis@gmail.com> Co-authored-by: Nicola Crivellin <nicola.crivellin98@gmail.com>
Diffstat (limited to 'arch/arch.py')
| -rw-r--r-- | arch/arch.py | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arch.py b/arch/arch.py index a46439e..ba94631 100644 --- a/arch/arch.py +++ b/arch/arch.py @@ -1,7 +1,23 @@ +from typing import Iterable + class Arch(): - def __init__(self, archname: str, regnames: list[str]): + def __init__(self, archname: str, regnames: Iterable[str]): self.archname = archname self.regnames = set(regnames) + def to_regname(self, name: str) -> str | None: + """Transform a string into a standard register name. + + Override to implement things like name aliases etc. + + :param name: The possibly non-standard name to look up. + :return: The 'corrected' register name, or None if `name` cannot be + transformed into a register name. + """ + name = name.upper() + if name in self.regnames: + return name + return None + def __eq__(self, other): return self.regnames == other.regnames |