about summary refs log tree commit diff stats
path: root/compare.py
diff options
context:
space:
mode:
authorTheofilos Augoustis <theofilos.augoustis@gmail.com>2023-11-26 11:56:49 +0100
committerTheofilos Augoustis <theofilos.augoustis@gmail.com>2023-11-26 11:56:49 +0100
commit47894bb5d2e425f28d992aee6331b89b85b2058d (patch)
treefd08c28c447fbb95e9d8d4122514227f9a48d0ad /compare.py
parenta4bf627c2440cbea392e27f138b07fa22cd9e6f1 (diff)
downloadfocaccia-47894bb5d2e425f28d992aee6331b89b85b2058d.tar.gz
focaccia-47894bb5d2e425f28d992aee6331b89b85b2058d.zip
Standardize X86 register names
Add some infrastructure for flexible register name matching (i.e. using
'PC' to look up RIP):

 - `Arch.to_regname` tries to look up a register's standard name from an
   arbitrary string.

 - `ArchX86` overrides `to_regname` to resolve alias names for
   registers. Currently just 'PC' for 'RIP'.

 - `ProgramState.read` and `ProgramState.write` use `to_regname` to make
   register access more convenient.

Add all flags with their standard abbreviations to `x86.regnames`.

Implement a full RFLAGS decomposition into its individual flags in
`x86`. Replace the hacks in `run.py` and `miasm_test.py` with this more
complete solution.

Co-authored-by: Theofilos Augoustis <theofilos.augoustis@gmail.com>
Co-authored-by: Nicola Crivellin <nicola.crivellin98@gmail.com>
Diffstat (limited to 'compare.py')
0 files changed, 0 insertions, 0 deletions