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| author | Theofilos Augoustis <theofilos.augoustis@gmail.com> | 2023-11-26 11:56:49 +0100 |
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| committer | Theofilos Augoustis <theofilos.augoustis@gmail.com> | 2023-11-26 11:56:49 +0100 |
| commit | 47894bb5d2e425f28d992aee6331b89b85b2058d (patch) | |
| tree | fd08c28c447fbb95e9d8d4122514227f9a48d0ad /symbolic.py | |
| parent | a4bf627c2440cbea392e27f138b07fa22cd9e6f1 (diff) | |
| download | focaccia-47894bb5d2e425f28d992aee6331b89b85b2058d.tar.gz focaccia-47894bb5d2e425f28d992aee6331b89b85b2058d.zip | |
Standardize X86 register names
Add some infrastructure for flexible register name matching (i.e. using 'PC' to look up RIP): - `Arch.to_regname` tries to look up a register's standard name from an arbitrary string. - `ArchX86` overrides `to_regname` to resolve alias names for registers. Currently just 'PC' for 'RIP'. - `ProgramState.read` and `ProgramState.write` use `to_regname` to make register access more convenient. Add all flags with their standard abbreviations to `x86.regnames`. Implement a full RFLAGS decomposition into its individual flags in `x86`. Replace the hacks in `run.py` and `miasm_test.py` with this more complete solution. Co-authored-by: Theofilos Augoustis <theofilos.augoustis@gmail.com> Co-authored-by: Nicola Crivellin <nicola.crivellin98@gmail.com>
Diffstat (limited to 'symbolic.py')
| -rw-r--r-- | symbolic.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/symbolic.py b/symbolic.py index a8d45d0..53e1bbf 100644 --- a/symbolic.py +++ b/symbolic.py @@ -10,7 +10,7 @@ from lldb_target import LLDBConcreteTarget def symbolize_state(state: angr.SimState, arch: Arch = x86.ArchX86(), - exclude: list[str] = ['PC', 'RBP', 'RSP'], + exclude: list[str] = ['RIP', 'RBP', 'RSP'], stack_name: str = 'stack', stack_size: int = 0x10) \ -> angr.SimState: |