diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arch.py | 7 | ||||
| -rw-r--r-- | arch/x86.py | 19 |
2 files changed, 21 insertions, 5 deletions
diff --git a/arch/arch.py b/arch/arch.py index ba94631..f2be5cb 100644 --- a/arch/arch.py +++ b/arch/arch.py @@ -3,7 +3,7 @@ from typing import Iterable class Arch(): def __init__(self, archname: str, regnames: Iterable[str]): self.archname = archname - self.regnames = set(regnames) + self.regnames = set(name.upper() for name in regnames) def to_regname(self, name: str) -> str | None: """Transform a string into a standard register name. @@ -20,4 +20,7 @@ class Arch(): return None def __eq__(self, other): - return self.regnames == other.regnames + return self.archname == other.archname + + def __repr__(self) -> str: + return self.archname diff --git a/arch/x86.py b/arch/x86.py index 776291d..95e1a82 100644 --- a/arch/x86.py +++ b/arch/x86.py @@ -1,8 +1,10 @@ -"""Architexture-specific configuration.""" +"""Architecture-specific configuration.""" from .arch import Arch -# Names of registers in the architexture +archname = 'x86_64' + +# Names of registers in the architecture regnames = [ 'RIP', 'RAX', @@ -22,11 +24,22 @@ regnames = [ 'R14', 'R15', 'RFLAGS', + + # x87 float registers + 'ST0', 'ST1', 'ST2', 'ST3', 'ST4', 'ST5', 'ST6', 'ST7', + + # Vector registers + 'YMM0', 'YMM1', 'YMM2', 'YMM3', 'YMM4', + 'YMM5', 'YMM6', 'YMM7', 'YMM8', 'YMM9', + 'YMM10', 'YMM11', 'YMM12', 'YMM13', 'YMM14', 'YMM15', + # Segment registers 'CS', 'DS', 'SS', 'ES', 'FS', 'GS', 'FS_BASE', 'GS_BASE', + # FLAGS 'CF', 'PF', 'AF', 'ZF', 'SF', 'TF', 'IF', 'DF', 'OF', 'IOPL', 'NT', + # EFLAGS 'RF', 'VM', 'AC', 'VIF', 'VIP', 'ID', ] @@ -74,7 +87,7 @@ def decompose_rflags(rflags: int) -> dict[str, int]: class ArchX86(Arch): def __init__(self): - super().__init__("X86", regnames) + super().__init__(archname, regnames) def to_regname(self, name: str) -> str | None: """The X86 override of the standard register name lookup. |