diff options
Diffstat (limited to 'focaccia')
| -rw-r--r-- | focaccia/compare.py | 26 | ||||
| -rw-r--r-- | focaccia/lldb_target.py | 2 | ||||
| -rw-r--r-- | focaccia/miasm_util.py | 2 |
3 files changed, 10 insertions, 20 deletions
diff --git a/focaccia/compare.py b/focaccia/compare.py index 36cd54e..d89a41a 100644 --- a/focaccia/compare.py +++ b/focaccia/compare.py @@ -57,9 +57,9 @@ def _calc_transformation(previous: ProgramState, current: ProgramState): transformation = ProgramState(arch) for reg in arch.regnames: try: - prev_val, cur_val = previous.read_register(reg), current.read_register(reg) - if prev_val is not None and cur_val is not None: - transformation.set_register(reg, cur_val - prev_val) + prev_val = previous.read_register(reg) + cur_val = current.read_register(reg) + transformation.set_register(reg, cur_val - prev_val) except RegisterAccessError: # Register is not set in either state pass @@ -138,12 +138,8 @@ def compare_simple(test_states: list[ProgramState], pc_txl = txl.read_register(PC_REGNAME) pc_truth = truth.read_register(PC_REGNAME) - # The program counter should always be set on a snapshot - assert(pc_truth is not None) - assert(pc_txl is not None) - if pc_txl != pc_truth: - print(f'Unmatched program counter {hex(txl.read_register(PC_REGNAME))}' + print(f'Unmatched program counter {hex(pc_txl)}' f' in translated code!') continue @@ -176,7 +172,7 @@ def _find_register_errors(txl_from: ProgramState, except MemoryAccessError as err: s, e = transform_truth.range return [Error( - ErrorTypes.INCOMPLETE, + ErrorTypes.POSSIBLE, f'Register transformations {hex(s)} -> {hex(e)} depend on' f' {err.mem_size} bytes at memory address {hex(err.mem_addr)}' f' that are not entirely present in the tested state' @@ -280,15 +276,9 @@ def _find_errors_symbolic(txl_from: ProgramState, :param transform_truth: The symbolic transformation that maps the source state to the destination state. """ - if (txl_from.read_register('PC') != transform_truth.range[0]) \ - or (txl_to.read_register('PC') != transform_truth.range[1]): - tstart, tend = transform_truth.range - return [Error(ErrorTypes.POSSIBLE, - f'Program counters of the tested transformation' - f' do not match the truth transformation:' - f' {hex(txl_from.read_register("PC"))} -> {hex(txl_to.read_register("PC"))}' - f' (test) vs. {hex(tstart)} -> {hex(tend)} (truth).' - f' Skipping with no errors.')] + from_pc = txl_from.read_register('PC') + to_pc = txl_to.read_register('PC') + assert((from_pc, to_pc) == transform_truth.range) errors = [] errors.extend(_find_register_errors(txl_from, txl_to, transform_truth)) diff --git a/focaccia/lldb_target.py b/focaccia/lldb_target.py index 05ab66d..903e73d 100644 --- a/focaccia/lldb_target.py +++ b/focaccia/lldb_target.py @@ -178,7 +178,7 @@ class LLDBConcreteTarget: if not err.success: raise ConcreteMemoryError(f'Error when reading {size} bytes at' f' address {hex(addr)}: {err}') - return content + return bytes(reversed(content)) # Convert to big endian def write_memory(self, addr, value: bytes): """Write bytes to memory. diff --git a/focaccia/miasm_util.py b/focaccia/miasm_util.py index 514390d..f43c151 100644 --- a/focaccia/miasm_util.py +++ b/focaccia/miasm_util.py @@ -131,7 +131,7 @@ def _eval_exprmem(expr: ExprMem, state: MiasmConcreteState): return expr assert(len(mem) * 8 == expr.size) - return ExprInt(int.from_bytes(mem, byteorder='little'), expr.size) + return ExprInt(int.from_bytes(mem), expr.size) def _eval_exprcond(expr, state: MiasmConcreteState): """Evaluate an ExprCond using the current state""" |