about summary refs log tree commit diff stats
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/focaccia/deterministic.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/focaccia/deterministic.py b/src/focaccia/deterministic.py
index 77bdcb0..e7914a3 100644
--- a/src/focaccia/deterministic.py
+++ b/src/focaccia/deterministic.py
@@ -491,7 +491,7 @@ class DeterministicLog:
                 return regs['pc'], regs
             raise NotImplementedError(f'Unable to parse registers for architecture {arch}')
 
-        def parse_memory_writes(event: Frame, reader: io.RawIOBase):
+        def parse_memory_writes(event: Frame, reader: io.RawIOBase) -> list[MemoryWrite]:
             writes = []
             for raw_write in event.memWrites:
                 # Skip memory writes with 0 bytes