mips32: little/big endian is now an attrib

5 files changed, 26 insertions, 47 deletions

diff --git a/miasm2/analysis/machine.py b/miasm2/analysis/machine.py
index a077339e..2fd88fda 100644
--- a/miasm2/analysis/machine.py
+++ b/miasm2/analysis/machine.py
@@ -61,11 +61,11 @@ class Machine(object):
             from miasm2.analysis.gdbserver import GdbServer_msp430 as gdbserver
         elif machine_name == "mips32b":
             from miasm2.arch.mips32.disasm import dis_mips32b as dis_engine
-            from miasm2.arch.mips32.arch import mn_mips32b as mn
+            from miasm2.arch.mips32.arch import mn_mips32 as mn
             from miasm2.arch.mips32.ira import ir_a_mips32 as ira
         elif machine_name == "mips32l":
             from miasm2.arch.mips32.disasm import dis_mips32l as dis_engine
-            from miasm2.arch.mips32.arch import mn_mips32l as mn
+            from miasm2.arch.mips32.arch import mn_mips32 as mn
             from miasm2.arch.mips32.ira import ir_a_mips32 as ira
         else:
             raise ValueError('Unknown machine: %s' % machine_name)
diff --git a/miasm2/arch/mips32/arch.py b/miasm2/arch/mips32/arch.py
index d8420a65..c6c5a55d 100644
--- a/miasm2/arch/mips32/arch.py
+++ b/miasm2/arch/mips32/arch.py
@@ -178,9 +178,9 @@ class instruction_mips32(instruction):
         return args
 
 
-class mn_mips32b(cls_mn):
+class mn_mips32(cls_mn):
     delayslot = 0
-    name = "mips32l"
+    name = "mips32"
     regs = regs_module
     bintree = {}
     num = 0
@@ -212,7 +212,7 @@ class mn_mips32b(cls_mn):
         o = 0
         while n:
             offset = start / 8
-            n_offset = cls.endian_offset(offset)
+            n_offset = cls.endian_offset(attrib, offset)
             c = cls.getbytes(bs, n_offset, 1)
             if not c:
                 raise IOError
@@ -228,8 +228,13 @@ class mn_mips32b(cls_mn):
         return o
 
     @classmethod
-    def endian_offset(cls, offset):
-        return offset
+    def endian_offset(cls, attrib, offset):
+        if attrib == "l":
+            return (offset & ~3) + 3 - offset % 4
+        elif attrib == "b":
+            return offset
+        else:
+            raise NotImplementedError('bad attrib')
 
     @classmethod
     def check_mnemo(cls, fields):
@@ -246,43 +251,17 @@ class mn_mips32b(cls_mn):
         return [(subcls, name, bases, dct, fields)]
 
     def value(self, mode):
-        v = super(mn_mips32b, self).value(mode)
+        v = super(mn_mips32, self).value(mode)
         return [x for x in v]
 
 
-
-
-class mn_mips32l(mn_mips32b):
-    delayslot = 0
-    name = "mips32b"
-    regs = regs_module
-    bintree = {}
-    num = 0
-    all_mn = []
-    all_mn_mode = defaultdict(list)
-    all_mn_name = defaultdict(list)
-    all_mn_inst = defaultdict(list)
-    pc = PC
-    sp = SP
-    instruction = instruction_mips32
-    max_instruction_len = 4
-
-    @classmethod
-    def endian_offset(cls, offset):
-        return (offset & ~3) + 3 - offset % 4
-
-    def value(self, mode):
-        v = super(mn_mips32b, self).value(mode)
-        return [x[::-1] for x in v]
-
-
 def mips32op(name, fields, args=None, alias=False):
     dct = {"fields": fields}
     dct["alias"] = alias
     if args is not None:
         dct['args'] = args
-    type(name, (mn_mips32l,), dct)
-    type(name, (mn_mips32b,), dct)
+    type(name, (mn_mips32,), dct)
+    #type(name, (mn_mips32b,), dct)
 
 
 class mips32_reg(reg_noarg, m_arg):
diff --git a/miasm2/arch/mips32/disasm.py b/miasm2/arch/mips32/disasm.py
index 9b236748..29b699eb 100644
--- a/miasm2/arch/mips32/disasm.py
+++ b/miasm2/arch/mips32/disasm.py
@@ -1,16 +1,16 @@
 from miasm2.core.asmbloc import asm_constraint, disasmEngine
-from arch import mn_mips32b, mn_mips32l
+from arch import mn_mips32
 
 
 
 class dis_mips32b(disasmEngine):
-    attrib = None
+    attrib = 'b'
     def __init__(self, bs=None, **kwargs):
-        super(dis_mips32b, self).__init__(mn_mips32b, self.attrib, bs, **kwargs)
+        super(dis_mips32b, self).__init__(mn_mips32, self.attrib, bs, **kwargs)
 
 
 class dis_mips32l(disasmEngine):
-    attrib = None
+    attrib = "l"
     def __init__(self, bs=None, **kwargs):
         super(dis_mips32l, self).__init__(mn_mips32l, self.attrib, bs, **kwargs)
 
diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py
index 1913a117..aeb64991 100644
--- a/miasm2/arch/mips32/sem.py
+++ b/miasm2/arch/mips32/sem.py
@@ -1,6 +1,6 @@
 from miasm2.expression.expression import *
 from miasm2.ir.ir import ir, irbloc
-from miasm2.arch.mips32.arch import mn_mips32l, mn_mips32b
+from miasm2.arch.mips32.arch import mn_mips32
 from miasm2.arch.mips32.regs import *
 
 def addiu(ir, instr, a, b, c):
@@ -450,9 +450,9 @@ def get_mnemo_expr(ir, instr, *args):
 class ir_mips32(ir):
 
     def __init__(self, symbol_pool=None):
-        ir.__init__(self, mn_mips32l, None, symbol_pool)
-        self.pc = mn_mips32l.getpc()
-        self.sp = mn_mips32l.getsp()
+        ir.__init__(self, mn_mips32, None, symbol_pool)
+        self.pc = mn_mips32.getpc()
+        self.sp = mn_mips32.getsp()
 
     def get_ir(self, instr):
         args = instr.args
diff --git a/test/arch/mips32/arch.py b/test/arch/mips32/arch.py
index 3bfef457..d0814a4c 100644
--- a/test/arch/mips32/arch.py
+++ b/test/arch/mips32/arch.py
@@ -220,17 +220,17 @@ for s, l in reg_tests_mips32:
     print "-" * 80
     s = s[12:]
     b = h2i((l))
-    mn = mn_mips32b.dis(b)
+    mn = mn_mips32.dis(b, 'b')
     print [str(x) for x in mn.args]
     print s
     print mn
     assert(str(mn) == s)
     # print hex(b)
     # print [str(x.get()) for x in mn.args]
-    l = mn_mips32b.fromstring(s)
+    l = mn_mips32.fromstring(s)
     # print l
     assert(str(l) == s)
-    a = mn_mips32b.asm(l)
+    a = mn_mips32.asm(l, 'b')
     print [x for x in a]
     print repr(b)
     # print mn.args