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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-05-07 22:37:22 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-05-24 12:23:52 +0200 |
| commit | 698c51becf12612af7928104990a7068b0191054 (patch) | |
| tree | ac8b77cfcc6481545c45d99a64eab577a93faa83 | |
| parent | 11d55f727529de9bbdf88f776584b3cbb7667c20 (diff) | |
| download | miasm-698c51becf12612af7928104990a7068b0191054.tar.gz miasm-698c51becf12612af7928104990a7068b0191054.zip | |
IR: slot irblock
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/x86/sem.py | 1 | ||||
| -rw-r--r-- | miasm2/ir/ir.py | 3 |
2 files changed, 2 insertions, 2 deletions
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index e1847fe7..ca5b3f8d 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -4614,7 +4614,6 @@ class ir_x86_16(IntermediateRepresentation): e_do = instr_ir c = IRBlock(lbl_do.name, [AssignBlock(e_do, instr)]) - c.except_automod = False e_n = [m2_expr.ExprAff(self.IRDst, m2_expr.ExprCond(c_reg, lbl_do, lbl_skip))] return e_n, [cond_bloc, c] + new_extra_ir diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py index 6dbf7835..986e5d56 100644 --- a/miasm2/ir/ir.py +++ b/miasm2/ir/ir.py @@ -258,6 +258,8 @@ class IRBlock(object): Stand for an intermediate representation basic block. """ + __slots__ = ["label", "_assignments", "_dst", "_dst_linenb"] + def __init__(self, label, irs): """ @label: AsmLabel of the IR basic block @@ -269,7 +271,6 @@ class IRBlock(object): for assignblk in irs: assert isinstance(assignblk, AssignBlock) self._assignments = tuple(irs) - self.except_automod = True self._dst = None self._dst_linenb = None |