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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-09-11 10:11:12 +0200 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-09-11 12:41:30 +0200 |
| commit | ac309492c91dd6022e926ba32ac556c2ecedabbb (patch) | |
| tree | 06e7b1931d1de60a93df6f442f9cfc12a8cf2abc | |
| parent | 37f6f9b561670f93685a3ade4ec9653af10e66b1 (diff) | |
| download | miasm-ac309492c91dd6022e926ba32ac556c2ecedabbb.tar.gz miasm-ac309492c91dd6022e926ba32ac556c2ecedabbb.zip | |
Add BEXTR instruction
| -rw-r--r-- | miasm/arch/x86/arch.py | 6 | ||||
| -rw-r--r-- | miasm/arch/x86/sem.py | 17 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 3 |
3 files changed, 26 insertions, 0 deletions
diff --git a/miasm/arch/x86/arch.py b/miasm/arch/x86/arch.py index be7c5975..4a8af629 100644 --- a/miasm/arch/x86/arch.py +++ b/miasm/arch/x86/arch.py @@ -948,6 +948,11 @@ class mn_x86(cls_mn): self.rex_x.value or self.rex_p.value): return False + if self.vex.value == 0 and (hasattr(self, 'pref_0f') + or hasattr(self, 'pref_0f38') + or hasattr(self, 'pref_0f3a')): + return False + if self.vex_m.value == 1 and not hasattr(self, 'pref_0f'): return False if self.vex_m.value == 2 and not hasattr(self, 'pref_0f38'): @@ -3780,6 +3785,7 @@ addop("fincstp", [bs8(0xd9), bs8(0xf7)]) addop("blsi", [pref_0f38, bs8(0xf3), vex_reg] + rmmod(bs("011"), rm_arg), [vex_reg, rm_arg]) addop("andn", [pref_0f38, bs8(0xf2), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, vex_reg, rm_arg]) +addop("bextr", [pref_0f38, bs8(0xf7), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, rm_arg, vex_reg]) # addop("finit", [bs8(0x9b), bs8(0xdb), bs8(0xe3)]) addop("fninit", [bs8(0xdb), bs8(0xe3)]) diff --git a/miasm/arch/x86/sem.py b/miasm/arch/x86/sem.py index 46b7a019..cb638bc7 100644 --- a/miasm/arch/x86/sem.py +++ b/miasm/arch/x86/sem.py @@ -4402,6 +4402,22 @@ def andn(_, instr, dst, src1, src2): e.append(m2_expr.ExprAssign(dst, result)) return e, [] +def bextr(_, instr, dst, src1, src2): + e = [] + + # TODO: change zero extension to 512 bits when AVX is supported + start = (src2 & m2_expr.ExprInt(0xFF, src2.size)).zeroExtend(256) + length = ((src2 & m2_expr.ExprInt(0xFF00, src2.size)) >> m2_expr.ExprInt(8, src2.size)).zeroExtend(256) + + tmp = src1.zeroExtend(256) >> start + mask = m2_expr.ExprInt(0, 256).mask >> (m2_expr.ExprInt(256, 256) - length) + + tmp = tmp & mask + result = tmp[:dst.size] + + e.append(m2_expr.ExprAssign(dst, result)) + return e, [] + def pshufb(_, instr, dst, src): e = [] if dst.size == 64: @@ -5535,6 +5551,7 @@ mnemo_func = {'mov': mov, # BMI operations "blsi": blsi, "andn": andn, + "bextr": bextr, # # MMX/AVX/SSE operations diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index b61201bb..6d578dd9 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -2596,6 +2596,9 @@ reg_tests = [ (m64, "00000000 ANDN RAX, RBX, RCX", "c4e2e0f2c1"), + (m64, "00000000 BEXTR RAX, RBX, RCX", + "c4e2f0f7c3"), + #### MMX/SSE/AVX operations #### |