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| author | Ajax <commial@gmail.com> | 2018-01-26 17:45:11 +0100 |
|---|---|---|
| committer | Ajax <commial@gmail.com> | 2018-01-26 17:47:05 +0100 |
| commit | 095a87261cbd19188665ff185861e4745cc377f4 (patch) | |
| tree | 0d393e53769a80648fffcef9d2e8cf5ead5ca799 | |
| parent | 0be43af1c4ebeb265667167052173eb5743ce800 (diff) | |
| download | miasm-095a87261cbd19188665ff185861e4745cc377f4.tar.gz miasm-095a87261cbd19188665ff185861e4745cc377f4.zip | |
Add PREFETCHNTA instruction semantic (as a NOP)
| -rw-r--r-- | miasm2/arch/x86/sem.py | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index 879a81ca..56aca1c2 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -2649,6 +2649,11 @@ def prefetchw(_, instr, src=None): # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf return [], [] +def prefetchnta(_, instr, src=None): + # see 4-201 on this documentation + # https://www-ssl.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf + return [], [] + def lfence(_, instr, src=None): # see 3-485 on this documentation @@ -4339,6 +4344,7 @@ mnemo_func = {'mov': mov, 'prefetch1': prefetch1, 'prefetch2': prefetch2, 'prefetchw': prefetchw, + 'prefetchnta': prefetchnta, 'lfence': lfence, 'mfence': mfence, 'sfence': sfence, @@ -4516,9 +4522,6 @@ mnemo_func = {'mov': mov, "cvttss2si": cvttss2si, - - - "bndmov": bndmov, |