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authorCamille Mougey <commial@gmail.com>2015-07-10 23:20:13 +0200
committerCamille Mougey <commial@gmail.com>2015-07-10 23:20:13 +0200
commit1d4e9e59a10dcf9a708c8ec0f7c795195917e379 (patch)
treeef7717167d265ef14b3a796a4d6fda05489006bd
parentcd7e115d6214cc6905a7f068897617de13cba54d (diff)
parentcd94fc882dcf9fe9e926be9da531f46094e23a18 (diff)
downloadmiasm-1d4e9e59a10dcf9a708c8ec0f7c795195917e379.tar.gz
miasm-1d4e9e59a10dcf9a708c8ec0f7c795195917e379.zip
Merge pull request #190 from serpilliere/x86_lds_reg
x86: avoid load effective reg
-rw-r--r--miasm2/arch/x86/arch.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index f168d9cb..33fd428f 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -791,7 +791,7 @@ class mn_x86(cls_mn):
                 m = a.expr
                 a.expr = ExprMem(
                     ExprOp('segm', enc2segm[self.g2.value], m.arg), m.size)
-        if self.name == 'LEA':
+        if self.name in ['LEA', 'LDS', 'LES', 'LFS', 'LGS', 'LSS']:
             if not isinstance(self.args[1].expr, ExprMem):
                 return None
         return self