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| author | serpilliere <serpilliere@users.noreply.github.com> | 2017-04-18 16:03:04 +0200 |
|---|---|---|
| committer | Camille Mougey <commial@gmail.com> | 2017-04-18 16:03:04 +0200 |
| commit | 2580f884fcbaaf29ae235f0f10d5ed62f6ffdf22 (patch) | |
| tree | 9c77991accffe970a7bca66128f6b13334e03905 | |
| parent | 66914aadcef60d590468f39a44d710aa28b0b772 (diff) | |
| download | miasm-2580f884fcbaaf29ae235f0f10d5ed62f6ffdf22.tar.gz miasm-2580f884fcbaaf29ae235f0f10d5ed62f6ffdf22.zip | |
Jitter: fix symb cache name (#525)
| -rw-r--r-- | miasm2/arch/mips32/jit.py | 2 | ||||
| -rw-r--r-- | miasm2/jitter/codegen.py | 19 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_cc_base.py | 2 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_llvm.py | 4 | ||||
| -rw-r--r-- | miasm2/jitter/llvmconvert.py | 14 |
5 files changed, 27 insertions, 14 deletions
diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py index 0ba531f1..bfa9c5fd 100644 --- a/miasm2/arch/mips32/jit.py +++ b/miasm2/arch/mips32/jit.py @@ -63,7 +63,7 @@ class mipsCGen(CGen): """ lbl = self.get_block_post_label(block) - out = (self.CODE_RETURN_NO_EXCEPTION % (lbl.name, + out = (self.CODE_RETURN_NO_EXCEPTION % (self.label_to_jitlabel(lbl), self.C_PC, m2_expr.ExprId('branch_dst_irdst'), m2_expr.ExprId('branch_dst_irdst'), diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index 9158aeba..09a6fecf 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -106,6 +106,11 @@ class CGen(object): self.C_PC = self.id_to_c(self.PC) + @staticmethod + def label_to_jitlabel(lbl): + assert lbl.offset is not None + return "jitblock_%X" % lbl.offset + def dst_to_c(self, src): if not isinstance(src, m2_expr.Expr): src = m2_expr.ExprInt(src, self.PC.size) @@ -340,7 +345,7 @@ class CGen(object): lbl = self.ir_arch.symbol_pool.getby_offset_create(dst) out += self.gen_post_code(attrib) out += self.gen_post_instr_checks(attrib) - out.append('goto %s;' % lbl.name) + out.append('goto %s;' % self.label_to_jitlabel(lbl)) else: out += self.gen_post_code(attrib) out.append('BlockDst->address = DST_value;') @@ -496,7 +501,7 @@ class CGen(object): instr_offsets = [line.offset for line in block.lines] instr_offsets.append(self.get_block_post_label(block).offset) lbl_start = self.ir_arch.symbol_pool.getby_offset_create(instr_offsets[0]) - return (self.CODE_INIT % lbl_start.name).split("\n"), instr_offsets + return (self.CODE_INIT % self.label_to_jitlabel(lbl_start)).split("\n"), instr_offsets def gen_irblock(self, attrib, instr_offsets, instr, irblock): """ @@ -534,7 +539,7 @@ class CGen(object): lbl = self.get_block_post_label(block) dst = self.dst_to_c(lbl.offset) - code = self.CODE_RETURN_NO_EXCEPTION % (lbl.name, self.C_PC, dst, dst) + code = self.CODE_RETURN_NO_EXCEPTION % (self.label_to_jitlabel(lbl), self.C_PC, dst, dst) return code.split('\n') def gen_c(self, block, log_mn=False, log_regs=False): @@ -557,8 +562,12 @@ class CGen(object): self.ir_arch.irbloc_fix_regs_for_mode( irblock, self.ir_arch.attrib) - out.append("%-40s // %.16X %s" % - (str(irblock.label.name) + ":", instr.offset, instr)) + if irblock.label.offset is None: + out.append("%-40s // %.16X %s" % + (str(irblock.label.name) + ":", instr.offset, instr)) + else: + out.append("%-40s // %.16X %s" % + (self.label_to_jitlabel(irblock.label) + ":", instr.offset, instr)) if index == 0: out += self.gen_pre_code(attrib) out += self.gen_irblock(attrib, instr_offsets, instr, irblock) diff --git a/miasm2/jitter/jitcore_cc_base.py b/miasm2/jitter/jitcore_cc_base.py index ae8a5dc2..0ca2392d 100644 --- a/miasm2/jitter/jitcore_cc_base.py +++ b/miasm2/jitter/jitcore_cc_base.py @@ -90,7 +90,7 @@ class JitCore_Cc_Base(JitCore): Generate function name from @label @label: AsmLabel instance """ - return "block_%s" % label.name + return "block_%s" % self.codegen.label_to_jitlabel(label) def gen_c_code(self, label, block): """ diff --git a/miasm2/jitter/jitcore_llvm.py b/miasm2/jitter/jitcore_llvm.py index d082dd79..7765ad39 100644 --- a/miasm2/jitter/jitcore_llvm.py +++ b/miasm2/jitter/jitcore_llvm.py @@ -82,7 +82,7 @@ class JitCore_LLVM(jitcore.JitCore): if not os.access(fname_out, os.R_OK): # Build a function in the context - func = LLVMFunction(self.context, block.label.name) + func = LLVMFunction(self.context, LLVMFunction.canonize_label_name(block.label)) # Set log level func.log_regs = self.log_regs @@ -113,7 +113,7 @@ class JitCore_LLVM(jitcore.JitCore): else: # The cache file exists: function can be loaded from cache - ptr = self.context.get_ptr_from_cache(fname_out, block.label.name) + ptr = self.context.get_ptr_from_cache(fname_out, LLVMFunction.canonize_label_name(block.label)) # Store a pointer on the function jitted code self.lbl2jitbloc[block.label.offset] = ptr diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py index 85000935..b2e1e957 100644 --- a/miasm2/jitter/llvmconvert.py +++ b/miasm2/jitter/llvmconvert.py @@ -503,15 +503,19 @@ class LLVMFunction(): var_casted = var self.builder.ret(var_casted) - def canonize_label_name(self, label): + @staticmethod + def canonize_label_name(label): """Canonize @label names to a common form. @label: str or asmlabel instance""" if isinstance(label, str): return label - elif isinstance(label, m2_asmblock.AsmLabel): - return "label_%s" % label.name - elif m2_asmblock.expr_is_label(label): - return "label_%s" % label.name.name + if m2_asmblock.expr_is_label(label): + label = label.name + if isinstance(label, m2_asmblock.AsmLabel): + if label.offset is None: + return "label_%s" % label.name + else: + return "label_%X" % label.offset else: raise ValueError("label must either be str or asmlabel") |