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authorFabrice Desclaux <fabrice.desclaux@cea.fr>2016-08-01 10:26:12 +0200
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2016-08-30 11:08:19 +0200
commit41f20a92c68969a97f6d6c82bf6b3c021d9763e3 (patch)
tree83bcc7887e45b49ce04ddcffeb038be9d15c2b04
parent4daf9861f4b07bbf10803a5593d473c2268bfbb6 (diff)
downloadmiasm-41f20a92c68969a97f6d6c82bf6b3c021d9763e3.tar.gz
miasm-41f20a92c68969a97f6d6c82bf6b3c021d9763e3.zip
Jitter/x86: custom dump_gpregs
-rw-r--r--miasm2/arch/x86/jit.py27
-rw-r--r--miasm2/jitter/arch/JitCore_x86.c41
-rw-r--r--miasm2/jitter/arch/JitCore_x86.h3
3 files changed, 64 insertions, 7 deletions
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py
index 771b651a..2e483f2a 100644
--- a/miasm2/arch/x86/jit.py
+++ b/miasm2/arch/x86/jit.py
@@ -4,6 +4,7 @@ from miasm2.jitter.jitload import jitter, named_arguments
 from miasm2.core import asmbloc
 from miasm2.core.utils import *
 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64
+from miasm2.jitter.codegen import CGen
 
 log = logging.getLogger('jit_x86')
 hnd = logging.StreamHandler()
@@ -11,8 +12,30 @@ hnd.setFormatter(logging.Formatter("[%(levelname)s]: %(message)s"))
 log.addHandler(hnd)
 log.setLevel(logging.CRITICAL)
 
+
+class x86_32_CGen(CGen):
+    def __init__(self, ir_arch):
+        self.ir_arch = ir_arch
+        self.PC = self.ir_arch.arch.regs.RIP
+        self.init_arch_C()
+
+    def gen_post_code(self, attrib):
+        out = []
+        if attrib.log_regs:
+            out.append('dump_gpregs_32(jitcpu->cpu);')
+        return out
+
+class x86_64_CGen(x86_32_CGen):
+    def gen_post_code(self, attrib):
+        out = []
+        if attrib.log_regs:
+            out.append('dump_gpregs_64(jitcpu->cpu);')
+        return out
+
 class jitter_x86_16(jitter):
 
+    C_Gen = x86_32_CGen
+
     def __init__(self, *args, **kwargs):
         sp = asmbloc.asm_symbol_pool()
         jitter.__init__(self, ir_x86_16(sp), *args, **kwargs)
@@ -44,6 +67,8 @@ class jitter_x86_16(jitter):
 
 class jitter_x86_32(jitter):
 
+    C_Gen = x86_32_CGen
+
     def __init__(self, *args, **kwargs):
         sp = asmbloc.asm_symbol_pool()
         jitter.__init__(self, ir_x86_32(sp), *args, **kwargs)
@@ -103,6 +128,8 @@ class jitter_x86_32(jitter):
 
 class jitter_x86_64(jitter):
 
+    C_Gen = x86_64_CGen
+
     def __init__(self, *args, **kwargs):
         sp = asmbloc.asm_symbol_pool()
         jitter.__init__(self, ir_x86_64(sp), *args, **kwargs)
diff --git a/miasm2/jitter/arch/JitCore_x86.c b/miasm2/jitter/arch/JitCore_x86.c
index b406e755..ba80fec1 100644
--- a/miasm2/jitter/arch/JitCore_x86.c
+++ b/miasm2/jitter/arch/JitCore_x86.c
@@ -176,17 +176,46 @@ PyObject * cpu_init_regs(JitCpu* self)
 
 }
 
-void dump_gpregs(vm_cpu_t* vmcpu)
+void dump_gpregs_32(vm_cpu_t* vmcpu)
 {
 
-	printf("RAX %.16"PRIX64" RBX %.16"PRIX64" RCX %.16"PRIX64" RDX %.16"PRIX64"\n",
+	printf("EAX %.8"PRIX32" EBX %.8"PRIX32" ECX %.8"PRIX32" EDX %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RAX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RBX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RCX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RDX & 0xFFFFFFFF));
+	printf("ESI %.8"PRIX32" EDI %.8"PRIX32" ESP %.8"PRIX32" EBP %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RSI & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RDI & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RSP & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RBP & 0xFFFFFFFF));
+	printf("EIP %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RIP & 0xFFFFFFFF));
+	printf("zf %.1"PRIX32" nf %.1"PRIX32" of %.1"PRIX32" cf %.1"PRIX32"\n",
+	       (uint32_t)(vmcpu->zf & 0x1),
+	       (uint32_t)(vmcpu->nf & 0x1),
+	       (uint32_t)(vmcpu->of & 0x1),
+	       (uint32_t)(vmcpu->cf & 0x1));
+
+}
+
+void dump_gpregs_64(vm_cpu_t* vmcpu)
+{
+
+	printf("RAX %.16"PRIX64" RBX %.16"PRIX64" RCX %.16"PRIX64" RDX %.16"PRIX64" ",
 	       vmcpu->RAX, vmcpu->RBX, vmcpu->RCX, vmcpu->RDX);
-	printf("RSI %.16"PRIX64" RDI %.16"PRIX64" RSP %.16"PRIX64" RBP %.16"PRIX64"\n",
+	printf("RSI %.16"PRIX64" RDI %.16"PRIX64" RSP %.16"PRIX64" RBP %.16"PRIX64" ",
 	       vmcpu->RSI, vmcpu->RDI, vmcpu->RSP, vmcpu->RBP);
-	printf("zf %.16"PRIX64" nf %.16"PRIX64" of %.16"PRIX64" cf %.16"PRIX64"\n",
-	       vmcpu->zf, vmcpu->nf, vmcpu->of, vmcpu->cf);
 	printf("RIP %.16"PRIX64"\n",
 	       vmcpu->RIP);
+	printf("R8  %.16"PRIX64" R9  %.16"PRIX64" R10 %.16"PRIX64" R11 %.16"PRIX64" ",
+	       vmcpu->R8, vmcpu->R9, vmcpu->R10, vmcpu->R11);
+	printf("R12 %.16"PRIX64" R13 %.16"PRIX64" R14 %.16"PRIX64" R15 %.16"PRIX64" ",
+	       vmcpu->R12, vmcpu->R13, vmcpu->R14, vmcpu->R15);
+
+
+	printf("zf %.1"PRIX64" nf %.1"PRIX64" of %.1"PRIX64" cf %.1"PRIX64"\n",
+	       vmcpu->zf, vmcpu->nf, vmcpu->of, vmcpu->cf);
 
 }
 
@@ -195,7 +224,7 @@ PyObject * cpu_dump_gpregs(JitCpu* self, PyObject* args)
 	vm_cpu_t* vmcpu;
 
 	vmcpu = self->cpu;
-	dump_gpregs(vmcpu);
+	dump_gpregs_64(vmcpu);
 	Py_INCREF(Py_None);
 	return Py_None;
 }
diff --git a/miasm2/jitter/arch/JitCore_x86.h b/miasm2/jitter/arch/JitCore_x86.h
index ac794d8e..1e58d536 100644
--- a/miasm2/jitter/arch/JitCore_x86.h
+++ b/miasm2/jitter/arch/JitCore_x86.h
@@ -274,7 +274,8 @@ typedef struct {
 
 
 
-void dump_gpregs(vm_cpu_t* vmcpu);
+void dump_gpregs_32(vm_cpu_t* vmcpu);
+void dump_gpregs_64(vm_cpu_t* vmcpu);
 uint64_t segm2addr(JitCpu* jitcpu, uint64_t segm, uint64_t addr);