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| author | Camille Mougey <commial@gmail.com> | 2017-04-05 12:19:36 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-04-05 12:19:36 +0200 |
| commit | 853ced97f700acb0d2d99762d161290e9f604b40 (patch) | |
| tree | e614f6c8ba85c33f82bb49b0f514c9fcf28b2097 | |
| parent | 24cbc5db935ff35d3eb4ca266af96c114dab3ddc (diff) | |
| parent | 1a9c577b6fa590182dc945c7f265cf4668da6df4 (diff) | |
| download | miasm-853ced97f700acb0d2d99762d161290e9f604b40.tar.gz miasm-853ced97f700acb0d2d99762d161290e9f604b40.zip | |
Merge pull request #512 from serpilliere/fix_arm_dumpreg
Jitter/arm: dump gpregs 32 bit output
| -rw-r--r-- | miasm2/jitter/arch/JitCore_arm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/miasm2/jitter/arch/JitCore_arm.c b/miasm2/jitter/arch/JitCore_arm.c index 0d7caeec..869a9a7c 100644 --- a/miasm2/jitter/arch/JitCore_arm.c +++ b/miasm2/jitter/arch/JitCore_arm.c @@ -117,13 +117,13 @@ PyObject * cpu_init_regs(JitCpu* self) void dump_gpregs(vm_cpu_t* vmcpu) { - printf("R0 %.16"PRIX32" R1 %.16"PRIX32" R2 %.16"PRIX32" R3 %.16"PRIX32" ", + printf("R0 %.8"PRIX32" R1 %.8"PRIX32" R2 %.8"PRIX32" R3 %.8"PRIX32" ", vmcpu->R0, vmcpu->R1, vmcpu->R2, vmcpu->R3); - printf("R4 %.16"PRIX32" R5 %.16"PRIX32" R6 %.16"PRIX32" R7 %.16"PRIX32"\n", + printf("R4 %.8"PRIX32" R5 %.8"PRIX32" R6 %.8"PRIX32" R7 %.8"PRIX32"\n", vmcpu->R4, vmcpu->R5, vmcpu->R6, vmcpu->R7); - printf("R8 %.16"PRIX32" R9 %.16"PRIX32" R10 %.16"PRIX32" R11 %.16"PRIX32" ", + printf("R8 %.8"PRIX32" R9 %.8"PRIX32" R10 %.8"PRIX32" R11 %.8"PRIX32" ", vmcpu->R8, vmcpu->R9, vmcpu->R10, vmcpu->R11); - printf("R12 %.16"PRIX32" SP %.16"PRIX32" LR %.16"PRIX32" PC %.16"PRIX32" ", + printf("R12 %.8"PRIX32" SP %.8"PRIX32" LR %.8"PRIX32" PC %.8"PRIX32" ", vmcpu->R12, vmcpu->SP, vmcpu->LR, vmcpu->PC); printf("zf %"PRIX32" nf %"PRIX32" of %"PRIX32" cf %"PRIX32"\n", vmcpu->zf, vmcpu->nf, vmcpu->of, vmcpu->cf); |