diff options
| author | Ajax <commial@gmail.com> | 2015-11-13 11:54:46 +0100 |
|---|---|---|
| committer | Ajax <commial@gmail.com> | 2015-11-13 11:54:46 +0100 |
| commit | d6a6f4aaa661ee45232b9b985f7b59c516b8b6c4 (patch) | |
| tree | 81472efc2f767f9742f30b21aa024ecc39d87651 | |
| parent | e4627f5c4ea3e0f3e3555d7d72d7be0cfeefbf6e (diff) | |
| download | miasm-d6a6f4aaa661ee45232b9b985f7b59c516b8b6c4.tar.gz miasm-d6a6f4aaa661ee45232b9b985f7b59c516b8b6c4.zip | |
x86: >>>/<<< c_cf are no more needed: use c_rez with rotate-1
| -rw-r--r-- | miasm2/arch/x86/sem.py | 15 | ||||
| -rw-r--r-- | miasm2/ir/translators/C.py | 2 | ||||
| -rw-r--r-- | miasm2/jitter/vm_mngr.c | 35 | ||||
| -rw-r--r-- | miasm2/jitter/vm_mngr.h | 3 |
4 files changed, 10 insertions, 45 deletions
diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index d8648644..f77fc2d4 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -415,20 +415,19 @@ def get_shift(a, b): shift = expr_simp(shift) return shift -def _rotate_tpl(ir, instr, a, b, op, op_cf=None, left=False): +def _rotate_tpl(ir, instr, a, b, op, left=False): """Template for generate rotater with operation @op A temporary basic block is generated to handle 0-rotate @op: operation to execute - @op_cf (optional): operation to use for carry flag. If not set, use @op @left (optional): indicates a left rotate if set, default is False """ - if op_cf is None: - op_cf = op - shifter = get_shift(a, b) res = m2_expr.ExprOp(op, a, shifter, cf.zeroExtend(a.size)) - new_cf = m2_expr.ExprOp(op_cf, a, shifter, cf.zeroExtend(a.size))[:1] + new_cf = m2_expr.ExprOp(op, a, + shifter - m2_expr.ExprInt(1, size=shifter.size), + cf.zeroExtend(a.size)) + new_cf = new_cf.msb() if left else new_cf[:1] new_of = m2_expr.ExprCond(b - m2_expr.ExprInt(1, size=b.size), m2_expr.ExprInt(0, size=of.size), res.msb() ^ new_cf if left else (a ^ res).msb()) @@ -481,11 +480,11 @@ def l_ror(ir, instr, a, b): def rcl(ir, instr, a, b): - return _rotate_tpl(ir, instr, a, b, '<<<c_rez', '<<<c_cf', left=True) + return _rotate_tpl(ir, instr, a, b, '<<<c_rez', left=True) def rcr(ir, instr, a, b): - return _rotate_tpl(ir, instr, a, b, '>>>c_rez', '>>>c_cf') + return _rotate_tpl(ir, instr, a, b, '>>>c_rez') def _shift_tpl(op, ir, instr, a, b, c=None, op_inv=None, left=False): diff --git a/miasm2/ir/translators/C.py b/miasm2/ir/translators/C.py index e9d799ca..72759900 100644 --- a/miasm2/ir/translators/C.py +++ b/miasm2/ir/translators/C.py @@ -23,9 +23,7 @@ class TranslatorC(Translator): 'div32': "div_op", 'idiv32': "div_op", # XXX to test '<<<c_rez': 'rcl_rez_op', - '<<<c_cf': 'rcl_cf_op', '>>>c_rez': 'rcr_rez_op', - '>>>c_cf': 'rcr_cf_op', } diff --git a/miasm2/jitter/vm_mngr.c b/miasm2/jitter/vm_mngr.c index 9ba3c227..ddcf86ca 100644 --- a/miasm2/jitter/vm_mngr.c +++ b/miasm2/jitter/vm_mngr.c @@ -847,7 +847,7 @@ uint64_t rot_right(uint64_t size, uint64_t a, uint64_t b) } -int rcl_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf) +unsigned int rcl_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf) { uint64_t tmp; @@ -887,43 +887,12 @@ int rcl_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int c } } -int rcr_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf) +unsigned int rcr_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf) { return rcl_rez_op(size, a, size+1-b, cf); } - -int rcl_cf_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf) -{ - uint64_t tmp; - - tmp = (cf<< size) | a; - - size++; - b %= size; - - switch(size){ - case 8+1: - tmp = (tmp << b) | ((tmp&0x1FF) >> (size-b)); - return (tmp>>8)&1; - case 16+1: - tmp = (tmp << b) | ((tmp&0x1FFFF) >> (size-b)); - return (tmp>>16)&1; - case 32+1: - tmp = (tmp << b) | ((tmp&0x1FFFFFFFFULL) >> (size-b)); - return (tmp>>32)&1; - default: - fprintf(stderr, "inv size in rclleft %d\n", size); - exit(0); - } -} - -int rcr_cf_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf) -{ - return rcl_cf_op(size, a, size+1-b, cf); -} - unsigned int x86_bsr(uint64_t src, unsigned int size) { int i; diff --git a/miasm2/jitter/vm_mngr.h b/miasm2/jitter/vm_mngr.h index 8653dd55..f5895e12 100644 --- a/miasm2/jitter/vm_mngr.h +++ b/miasm2/jitter/vm_mngr.h @@ -206,8 +206,7 @@ unsigned int div_op(unsigned int size, unsigned int a, unsigned int b, unsigned unsigned int rem_op(unsigned int size, unsigned int a, unsigned int b, unsigned int c); uint64_t rot_left(uint64_t size, uint64_t a, uint64_t b); uint64_t rot_right(uint64_t size, uint64_t a, uint64_t b); -int rcl_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf); -int rcl_cf_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf); +unsigned int rcl_rez_op(unsigned int size, unsigned int a, unsigned int b, unsigned int cf); #define UDIV(sizeA) \ |