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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2020-12-07 17:28:54 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2020-12-24 17:15:46 +0100 |
| commit | e6ec952904419c73531ab62443ade23985317daf (patch) | |
| tree | cb7063e3958c2b7e65d29cb25bb38a64e6a2f060 | |
| parent | f178c253c4665cb3e495073168dc244782d07c17 (diff) | |
| download | miasm-e6ec952904419c73531ab62443ade23985317daf.tar.gz miasm-e6ec952904419c73531ab62443ade23985317daf.zip | |
Rename ira => LifterModelCall
40 files changed, 376 insertions, 373 deletions
diff --git a/example/disasm/dis_binary_ir.py b/example/disasm/dis_binary_ir.py index 3facd74b..6ad69b05 100644 --- a/example/disasm/dis_binary_ir.py +++ b/example/disasm/dis_binary_ir.py @@ -25,8 +25,8 @@ asmcfg = mdis.dis_multiblock(addr) # End common section # ##################################### -# Get an IR converter -ir_arch = machine.ir(mdis.loc_db) +# Get a Lifter +ir_arch = machine.lifter(mdis.loc_db) # Get the IR of the asmcfg ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg) diff --git a/example/disasm/dis_binary_ira.py b/example/disasm/dis_binary_ira.py index bfed3497..95b3a70b 100644 --- a/example/disasm/dis_binary_ira.py +++ b/example/disasm/dis_binary_ira.py @@ -29,7 +29,7 @@ asmcfg = mdis.dis_multiblock(addr) # Get an IRA converter # The sub call are modelised by default operators # call_func_ret and call_func_stack -ir_arch_analysis = machine.ira(mdis.loc_db) +ir_arch_analysis = machine.lifter_model_call(mdis.loc_db) # Get the IR of the asmcfg ircfg_analysis = ir_arch_analysis.new_ircfg_from_asmcfg(asmcfg) @@ -39,4 +39,4 @@ for irblock in viewvalues(ircfg_analysis.blocks): print(irblock) # Output ir control flow graph in a dot file -open('bin_ira_cfg.dot', 'w').write(ircfg_analysis.dot()) +open('bin_lifter_model_call_cfg.dot', 'w').write(ircfg_analysis.dot()) diff --git a/example/disasm/full.py b/example/disasm/full.py index 47eca56d..3408e6d7 100644 --- a/example/disasm/full.py +++ b/example/disasm/full.py @@ -106,7 +106,6 @@ if not arch: # Instance the arch-dependent machine machine = Machine(arch) mn, dis_engine = machine.mn, machine.dis_engine -ira, ir = machine.ira, machine.ir log.info('ok') mdis = dis_engine(bs, loc_db=cont.loc_db) @@ -215,9 +214,9 @@ if args.propagexpr: args.gen_ir = True -class IRADelModCallStack(ira): +class LifterDelModCallStack(machine.lifter_model_call): def call_effects(self, addr, instr): - assignblks, extra = super(IRADelModCallStack, self).call_effects(addr, instr) + assignblks, extra = super(LifterDelModCallStack, self).call_effects(addr, instr) if not args.calldontmodstack: return assignblks, extra out = [] @@ -232,21 +231,21 @@ class IRADelModCallStack(ira): # Bonus, generate IR graph if args.gen_ir: - log.info("generating IR and IR analysis") + log.info("Lift and Lift with modeled calls") - ir_arch = ir(mdis.loc_db) - ir_arch_a = IRADelModCallStack(mdis.loc_db) + lifter = machine.lifter(mdis.loc_db) + lifter_model_call = LifterDelModCallStack(mdis.loc_db) - ircfg = ir_arch.new_ircfg() - ircfg_a = ir_arch.new_ircfg() + ircfg = lifter.new_ircfg() + ircfg_a = lifter.new_ircfg() head = list(entry_points)[0] for ad, asmcfg in viewitems(all_funcs_blocks): log.info("generating IR... %x" % ad) for block in asmcfg.blocks: - ir_arch.add_asmblock_to_ircfg(block, ircfg) - ir_arch_a.add_asmblock_to_ircfg(block, ircfg_a) + lifter.add_asmblock_to_ircfg(block, ircfg) + lifter_model_call.add_asmblock_to_ircfg(block, ircfg_a) log.info("Print blocks (without analyse)") for label, block in viewitems(ircfg.blocks): @@ -260,7 +259,7 @@ if args.gen_ir: if args.simplify > 0: log.info("Simplify...") - ircfg_simplifier = IRCFGSimplifierCommon(ir_arch_a) + ircfg_simplifier = IRCFGSimplifierCommon(lifter_model_call) ircfg_simplifier.simplify(ircfg_a, head) log.info("ok...") @@ -309,12 +308,12 @@ if args.propagexpr: ssa = self.do_simplify_loop(ssa, head) ircfg = self.ssa_to_unssa(ssa, head) - ircfg_simplifier = IRCFGSimplifierCommon(self.ir_arch) + ircfg_simplifier = IRCFGSimplifierCommon(self.lifter) ircfg_simplifier.deadremoval.add_expr_to_original_expr(ssa.ssa_variable_to_expr) ircfg_simplifier.simplify(ircfg, head) return ircfg head = list(entry_points)[0] - simplifier = CustomIRCFGSimplifierSSA(ir_arch_a) + simplifier = CustomIRCFGSimplifierSSA(lifter_model_call) ircfg = simplifier.simplify(ircfg_a, head) open('final.dot', 'w').write(ircfg.dot()) diff --git a/example/expression/access_c.py b/example/expression/access_c.py index 3cc8e6a2..fd50a917 100644 --- a/example/expression/access_c.py +++ b/example/expression/access_c.py @@ -95,10 +95,10 @@ class MyExprToAccessC(ExprToAccessC): reduction_rules = ExprToAccessC.reduction_rules + [reduce_compose] -def get_funcs_arg0(ctx, ira, ircfg, lbl_head): +def get_funcs_arg0(ctx, lifter_model_call, ircfg, lbl_head): """Compute DependencyGraph on the func @lbl_head""" g_dep = DependencyGraph(ircfg, follow_call=False) - element = ira.arch.regs.RSI + element = lifter_model_call.arch.regs.RSI for loc_key, index in find_call(ircfg): irb = ircfg.get_block(loc_key) @@ -106,7 +106,7 @@ def get_funcs_arg0(ctx, ira, ircfg, lbl_head): print('Analysing references from:', hex(instr.offset), instr) g_list = g_dep.get(irb.loc_key, set([element]), index, set([lbl_head])) for dep in g_list: - emul_result = dep.emul(ira, ctx) + emul_result = dep.emul(lifter_model_call, ctx) value = emul_result[element] yield value @@ -144,14 +144,14 @@ types_mngr = CTypesManagerNotPacked(types_ast, base_types) cont = Container.fallback_container(data, None, addr=0) machine = Machine("x86_64") -dis_engine, ira = machine.dis_engine, machine.ira +dis_engine, lifter_model_call = machine.dis_engine, machine.lifter_model_call mdis = dis_engine(cont.bin_stream, loc_db=loc_db) addr_head = 0 asmcfg = mdis.dis_multiblock(addr_head) lbl_head = loc_db.get_offset_location(addr_head) -ir_arch_a = ira(loc_db) +ir_arch_a = lifter_model_call(loc_db) ircfg = ir_arch_a.new_ircfg_from_asmcfg(asmcfg) open('graph_irflow.dot', 'w').write(ircfg.dot()) diff --git a/example/expression/asm_to_ir.py b/example/expression/asm_to_ir.py index 8ecc4f24..32d4ae8b 100644 --- a/example/expression/asm_to_ir.py +++ b/example/expression/asm_to_ir.py @@ -7,7 +7,7 @@ from miasm.arch.x86.arch import mn_x86 from miasm.core import parse_asm from miasm.expression.expression import * from miasm.core import asmblock -from miasm.arch.x86.ira import ir_a_x86_32 +from miasm.arch.x86.lifter_model_call import ir_a_x86_32 from miasm.analysis.data_flow import DeadRemoval from miasm.core.locationdb import LocationDB diff --git a/example/expression/constant_propagation.py b/example/expression/constant_propagation.py index a5929eed..0ea8028c 100644 --- a/example/expression/constant_propagation.py +++ b/example/expression/constant_propagation.py @@ -30,7 +30,7 @@ machine = Machine("x86_32") loc_db = LocationDB() cont = Container.from_stream(open(args.filename, 'rb'), loc_db) mdis = machine.dis_engine(cont.bin_stream, loc_db=loc_db) -ir_arch = machine.ira(mdis.loc_db) +ir_arch = machine.lifter_model_call(mdis.loc_db) addr = int(args.address, 0) deadrm = DeadRemoval(ir_arch) diff --git a/example/expression/export_llvm.py b/example/expression/export_llvm.py index a4c65787..74587ffd 100644 --- a/example/expression/export_llvm.py +++ b/example/expression/export_llvm.py @@ -17,16 +17,16 @@ loc_db = LocationDB() # This part focus on obtaining an IRCFG to transform # cont = Container.from_stream(open(args.target, 'rb'), loc_db) machine = Machine(args.architecture if args.architecture else cont.arch) -ir = machine.ir(loc_db) +lifter = machine.lifter(loc_db) dis = machine.dis_engine(cont.bin_stream, loc_db=loc_db) asmcfg = dis.dis_multiblock(int(args.addr, 0)) -ircfg = ir.new_ircfg_from_asmcfg(asmcfg) +ircfg = lifter.new_ircfg_from_asmcfg(asmcfg) ircfg.simplify(expr_simp_high_to_explicit) ###################################################### # Instantiate a context and the function to fill context = LLVMContext_IRCompilation() -context.ir_arch = ir +context.lifter = lifter func = LLVMFunction_IRCompilation(context, name="test") func.ret_type = llvm_ir.VoidType() diff --git a/example/expression/get_read_write.py b/example/expression/get_read_write.py index cf333d0c..d6bb37c2 100644 --- a/example/expression/get_read_write.py +++ b/example/expression/get_read_write.py @@ -4,7 +4,7 @@ from future.utils import viewitems from miasm.arch.x86.arch import mn_x86 from miasm.expression.expression import get_rw -from miasm.arch.x86.ira import ir_a_x86_32 +from miasm.arch.x86.lifter_model_call import ir_a_x86_32 from miasm.core.locationdb import LocationDB loc_db = LocationDB() diff --git a/example/expression/graph_dataflow.py b/example/expression/graph_dataflow.py index 4b428df7..661d0037 100644 --- a/example/expression/graph_dataflow.py +++ b/example/expression/graph_dataflow.py @@ -139,7 +139,7 @@ print('ok') print('generating dataflow graph for:') -ir_arch_analysis = machine.ira(loc_db) +ir_arch_analysis = machine.lifter_model_call(loc_db) ircfg = ir_arch_analysis.new_ircfg_from_asmcfg(asmcfg) deadrm = DeadRemoval(ir_arch_analysis) diff --git a/example/expression/solve_condition_stp.py b/example/expression/solve_condition_stp.py index 3743bfad..634e2337 100644 --- a/example/expression/solve_condition_stp.py +++ b/example/expression/solve_condition_stp.py @@ -30,7 +30,7 @@ if not args: sys.exit(0) -def emul_symb(ir_arch, ircfg, mdis, states_todo, states_done): +def emul_symb(lifter, ircfg, mdis, states_todo, states_done): while states_todo: addr, symbols, conds = states_todo.pop() print('*' * 40, "addr", addr, '*' * 40) @@ -38,11 +38,11 @@ def emul_symb(ir_arch, ircfg, mdis, states_todo, states_done): print('Known state, skipping', addr) continue states_done.add((addr, symbols, conds)) - symbexec = SymbolicExecutionEngine(ir_arch) + symbexec = SymbolicExecutionEngine(lifter) symbexec.symbols = symbols.copy() - if ir_arch.pc in symbexec.symbols: - del symbexec.symbols[ir_arch.pc] - irblock = get_block(ir_arch, ircfg, mdis, addr) + if lifter.pc in symbexec.symbols: + del symbexec.symbols[lifter.pc] + irblock = get_block(lifter, ircfg, mdis, addr) print('Run block:') print(irblock) @@ -87,9 +87,9 @@ if __name__ == '__main__': cont = Container.from_stream(open(args[0], 'rb'), loc_db) mdis = machine.dis_engine(cont.bin_stream, loc_db=loc_db) - ir_arch = machine.ir(mdis.loc_db) - ircfg = ir_arch.new_ircfg() - symbexec = SymbolicExecutionEngine(ir_arch) + lifter = machine.lifter(mdis.loc_db) + ircfg = lifter.new_ircfg() + symbexec = SymbolicExecutionEngine(lifter) asmcfg = parse_asm.parse_txt( machine.mn, 32, ''' @@ -129,19 +129,19 @@ if __name__ == '__main__': print(block) # add fake address and len to parsed instructions - ir_arch.add_asmblock_to_ircfg(block, ircfg) + lifter.add_asmblock_to_ircfg(block, ircfg) irb = ircfg.blocks[init_lbl] symbexec.eval_updt_irblock(irb) symbexec.dump(ids=False) - # reset ir_arch blocks - ir_arch.blocks = {} + # reset lifter blocks + lifter.blocks = {} states_todo = set() states_done = set() states_todo.add((addr, symbexec.symbols, ())) # emul blocks, propagate states - emul_symb(ir_arch, ircfg, mdis, states_todo, states_done) + emul_symb(lifter, ircfg, mdis, states_todo, states_done) all_info = [] @@ -156,7 +156,7 @@ if __name__ == '__main__': all_cases = set() - symbexec = SymbolicExecutionEngine(ir_arch) + symbexec = SymbolicExecutionEngine(lifter) for addr, reqs_cond in all_info: out = ['(set-logic QF_ABV)', '(set-info :smt-lib-version 2.0)'] diff --git a/example/ida/ctype_propagation.py b/example/ida/ctype_propagation.py index 1f55a975..3de81d0d 100644 --- a/example/ida/ctype_propagation.py +++ b/example/ida/ctype_propagation.py @@ -222,9 +222,9 @@ class CTypeEngineFixer(SymbExecCTypeFix): cst_propag_link) -def get_ira_call_fixer(ira): +def get_lifter_model_call_call_fixer(lifter_model_call): - class iraCallStackFixer(ira): + class lifter_model_callCallStackFixer(lifter_model_call): def call_effects(self, ad, instr): print(hex(instr.offset), instr) @@ -241,7 +241,7 @@ def get_ira_call_fixer(ira): ) return [call_assignblk], [] - return iraCallStackFixer + return lifter_model_callCallStackFixer def analyse_function(): @@ -262,7 +262,7 @@ def analyse_function(): # Init machine = guess_machine(addr=addr) - mn, dis_engine, ira = machine.mn, machine.dis_engine, machine.ira + mn, dis_engine, lifter_model_call = machine.mn, machine.dis_engine, machine.lifter_model_call bs = bin_stream_ida() loc_db = LocationDB() @@ -272,8 +272,8 @@ def analyse_function(): mdis.dont_dis = [end] - iraCallStackFixer = get_ira_call_fixer(ira) - ir_arch = iraCallStackFixer(loc_db) + lifter_model_callCallStackFixer = get_lifter_model_call_call_fixer(lifter_model_call) + ir_arch = lifter_model_callCallStackFixer(loc_db) asmcfg = mdis.dis_multiblock(addr) # Generate IR diff --git a/example/ida/depgraph.py b/example/ida/depgraph.py index e98d64c5..4a0fb1e9 100644 --- a/example/ida/depgraph.py +++ b/example/ida/depgraph.py @@ -26,9 +26,9 @@ from utils import guess_machine class depGraphSettingsForm(ida_kernwin.Form): - def __init__(self, ira, ircfg, mn): + def __init__(self, lifter_model_call, ircfg, mn): - self.ira = ira + self.lifter_model_call = lifter_model_call self.ircfg = ircfg self.mn = mn self.stk_args = {'ARG%d' % i:i for i in range(10)} @@ -51,7 +51,7 @@ class depGraphSettingsForm(ida_kernwin.Form): assert line_nb is not None cur_loc_key = str(cur_block.loc_key) loc_keys = sorted(map(str, ircfg.blocks)) - regs = sorted(ira.arch.regs.all_regs_ids_byname) + regs = sorted(lifter_model_call.arch.regs.all_regs_ids_byname) regs += list(self.stk_args) reg_default = regs[0] for i in range(10): @@ -130,13 +130,13 @@ Method to use: line = self.ircfg.blocks[self.loc_key][self.line_nb].instr arg_num = self.stk_args[value] stk_high = m2_expr.ExprInt(idc.get_spd(line.offset), ir_arch.sp.size) - stk_off = m2_expr.ExprInt(self.ira.sp.size // 8 * arg_num, ir_arch.sp.size) - element = m2_expr.ExprMem(self.mn.regs.regs_init[ir_arch.sp] + stk_high + stk_off, self.ira.sp.size) + stk_off = m2_expr.ExprInt(self.lifter_model_call.sp.size // 8 * arg_num, ir_arch.sp.size) + element = m2_expr.ExprMem(self.mn.regs.regs_init[ir_arch.sp] + stk_high + stk_off, self.lifter_model_call.sp.size) element = expr_simp(element) # Force stack unaliasing self.stk_unalias_force = True elif value: - element = self.ira.arch.regs.all_regs_ids_byname.get(value, None) + element = self.lifter_model_call.arch.regs.all_regs_ids_byname.get(value, None) else: raise ValueError("Unknown element '%s'!" % value) @@ -214,13 +214,13 @@ def launch_depgraph(): # Init machine = guess_machine(addr=func.start_ea) - mn, dis_engine, ira = machine.mn, machine.dis_engine, machine.ira + mn, dis_engine, lifter_model_call = machine.mn, machine.dis_engine, machine.lifter_model_call bs = bin_stream_ida() loc_db = LocationDB() mdis = dis_engine(bs, loc_db=loc_db, dont_dis_nulstart_bloc=True) - ir_arch = ira(loc_db) + ir_arch = lifter_model_call(loc_db) # Populate symbols with ida names for ad, name in idautils.Names(): diff --git a/example/ida/graph_ir.py b/example/ida/graph_ir.py index d10e1ebd..c827bbe2 100644 --- a/example/ida/graph_ir.py +++ b/example/ida/graph_ir.py @@ -180,9 +180,9 @@ def is_addr_ro_variable(bs, addr, size): def build_graph(start_addr, type_graph, simplify=False, use_ida_stack=True, dontmodstack=False, loadint=False, verbose=False): machine = guess_machine(addr=start_addr) - dis_engine, ira = machine.dis_engine, machine.ira + dis_engine, lifter_model_call = machine.dis_engine, machine.lifter_model_call - class IRADelModCallStack(ira): + class IRADelModCallStack(lifter_model_call): def call_effects(self, addr, instr): assignblks, extra = super(IRADelModCallStack, self).call_effects(addr, instr) if use_ida_stack: @@ -281,7 +281,7 @@ def build_graph(start_addr, type_graph, simplify=False, use_ida_stack=True, dont return - class IRAOutRegs(ira): + class IRAOutRegs(lifter_model_call): def get_out_regs(self, block): regs_todo = super(IRAOutRegs, self).get_out_regs(block) out = {} diff --git a/example/ida/symbol_exec.py b/example/ida/symbol_exec.py index b51ef9ee..ef5db082 100644 --- a/example/ida/symbol_exec.py +++ b/example/ida/symbol_exec.py @@ -150,11 +150,11 @@ def symbolic_exec(): mdis.dont_dis = [end] asmcfg = mdis.dis_multiblock(start) - ira = machine.ira(loc_db=loc_db) - ircfg = ira.new_ircfg_from_asmcfg(asmcfg) + lifter_model_call = machine.lifter_model_call(loc_db=loc_db) + ircfg = lifter_model_call.new_ircfg_from_asmcfg(asmcfg) print("Run symbolic execution...") - sb = SymbolicExecutionEngine(ira, machine.mn.regs.regs_init) + sb = SymbolicExecutionEngine(lifter_model_call, machine.mn.regs.regs_init) sb.run_at(ircfg, start) modified = {} diff --git a/example/symbol_exec/depgraph.py b/example/symbol_exec/depgraph.py index 8285452e..62190e6b 100644 --- a/example/symbol_exec/depgraph.py +++ b/example/symbol_exec/depgraph.py @@ -52,7 +52,7 @@ for element in args.element: raise ValueError("Unknown element '%s'" % element) mdis = machine.dis_engine(cont.bin_stream, dont_dis_nulstart_bloc=True, loc_db=loc_db) -ir_arch = machine.ira(loc_db) +ir_arch = machine.lifter_model_call(loc_db) # Common argument forms init_ctx = {} diff --git a/example/symbol_exec/dse_crackme.py b/example/symbol_exec/dse_crackme.py index e014ada2..cdaf5a1a 100644 --- a/example/symbol_exec/dse_crackme.py +++ b/example/symbol_exec/dse_crackme.py @@ -137,7 +137,7 @@ FILE_stream = ExprId("FILE_0", 64) FILE_size = ExprId("FILE_0_size", 64) def xxx_fopen_symb(dse): - regs = dse.ir_arch.arch.regs + regs = dse.lifter.arch.regs fname_addr = dse.eval_expr(regs.RDI) mode = dse.eval_expr(regs.RSI) assert fname_addr.is_int() @@ -151,13 +151,13 @@ def xxx_fopen_symb(dse): dse.update_state({ regs.RSP: dse.eval_expr(regs.RSP + ExprInt(8, regs.RSP.size)), - dse.ir_arch.IRDst: ret_addr, + dse.lifter.IRDst: ret_addr, regs.RIP: ret_addr, regs.RAX: ret_value, }) def xxx_fread_symb(dse): - regs = dse.ir_arch.arch.regs + regs = dse.lifter.arch.regs ptr = dse.eval_expr(regs.RDI) size = dse.eval_expr(regs.RSI) nmemb = dse.eval_expr(regs.RDX) @@ -179,21 +179,21 @@ def xxx_fread_symb(dse): update.update({ regs.RSP: dse.symb.eval_expr(regs.RSP + ExprInt(8, regs.RSP.size)), - dse.ir_arch.IRDst: ret_addr, + dse.lifter.IRDst: ret_addr, regs.RIP: ret_addr, regs.RAX: ret_value, }) dse.update_state(update) def xxx_fclose_symb(dse): - regs = dse.ir_arch.arch.regs + regs = dse.lifter.arch.regs stream = dse.eval_expr(regs.RDI) FILE_to_info_symb[stream].close() ret_addr = ExprInt(dse.jitter.get_stack_arg(0), regs.RIP.size) dse.update_state({ regs.RSP: dse.symb.eval_expr(regs.RSP + ExprInt(8, regs.RSP.size)), - dse.ir_arch.IRDst: ret_addr, + dse.lifter.IRDst: ret_addr, regs.RIP: ret_addr, regs.RAX: ExprInt(0, regs.RAX.size), }) @@ -203,7 +203,7 @@ def xxx_fclose_symb(dse): def xxx___libc_start_main_symb(dse): # ['RDI', 'RSI', 'RDX', 'RCX', 'R8', 'R9'] # main, argc, argv, ... - regs = dse.ir_arch.arch.regs + regs = dse.lifter.arch.regs top_stack = dse.eval_expr(regs.RSP) main_addr = dse.eval_expr(regs.RDI) argc = dse.eval_expr(regs.RSI) @@ -214,8 +214,8 @@ def xxx___libc_start_main_symb(dse): ExprMem(top_stack, 64): hlt_addr, regs.RDI: argc, regs.RSI: argv, - dse.ir_arch.IRDst: main_addr, - dse.ir_arch.pc: main_addr, + dse.lifter.IRDst: main_addr, + dse.lifter.pc: main_addr, }) # Stop the execution on puts and get back the corresponding string @@ -248,9 +248,9 @@ dse.attach(sb.jitter) # Update the jitter state: df is read, but never set # Approaches: specific or generic # - Specific: -# df_value = ExprInt(sb.jitter.cpu.df, dse.ir_arch.arch.regs.df.size) +# df_value = ExprInt(sb.jitter.cpu.df, dse.lifter.arch.regs.df.size) # dse.update_state({ -# dse.ir_arch.arch.regs.df: df_value +# dse.lifter.arch.regs.df: df_value # }) # - Generic: dse.update_state_from_concrete() diff --git a/example/symbol_exec/single_instr.py b/example/symbol_exec/single_instr.py index 789252df..0aabbf8b 100644 --- a/example/symbol_exec/single_instr.py +++ b/example/symbol_exec/single_instr.py @@ -21,12 +21,12 @@ mdis.lines_wd = 1 asm_block = mdis.dis_block(START_ADDR) # Translate ASM -> IR -ira = machine.ira(mdis.loc_db) -ircfg = ira.new_ircfg() -ira.add_asmblock_to_ircfg(asm_block, ircfg) +lifter_model_call = machine.lifter_model_call(mdis.loc_db) +ircfg = lifter_model_call.new_ircfg() +lifter_model_call.add_asmblock_to_ircfg(asm_block, ircfg) # Instantiate a Symbolic Execution engine with default value for registers -symb = SymbolicExecutionEngine(ira) +symb = SymbolicExecutionEngine(lifter_model_call) # Emulate one IR basic block ## Emulation of several basic blocks can be done through .emul_ir_blocks @@ -39,6 +39,6 @@ print('Modified memory (should be empty):') symb.dump(ids=False) # Check final status -eax, ebx = ira.arch.regs.EAX, ira.arch.regs.EBX +eax, ebx = lifter_model_call.arch.regs.EAX, lifter_model_call.arch.regs.EBX assert symb.symbols[eax] == ebx assert eax in symb.symbols diff --git a/miasm/analysis/data_flow.py b/miasm/analysis/data_flow.py index c68e9e65..fb04d5fd 100644 --- a/miasm/analysis/data_flow.py +++ b/miasm/analysis/data_flow.py @@ -793,7 +793,7 @@ def get_interval_length(interval_in): def check_expr_below_stack(ir_arch_a, expr): """ Return False if expr pointer is below original stack pointer - @ir_arch_a: ira instance + @ir_arch_a: lifter_model_call instance @expr: Expression instance """ ptr = expr.ptr @@ -809,7 +809,7 @@ def retrieve_stack_accesses(ir_arch_a, ircfg): """ Walk the ssa graph and find stack based variables. Return a dictionary linking stack base address to its size/name - @ir_arch_a: ira instance + @ir_arch_a: lifter_model_call instance @ircfg: IRCFG instance """ stack_vars = set() @@ -889,7 +889,7 @@ def replace_stack_vars(ir_arch_a, ircfg): WARNING: may fail - @ir_arch_a: ira instance + @ir_arch_a: lifter_model_call instance @ircfg: IRCFG instance """ @@ -949,7 +949,7 @@ def read_mem(bs, expr): def load_from_int(ir_arch, bs, is_addr_ro_variable): """ Replace memory read based on constant with static value - @ir_arch: ira instance + @ir_arch: lifter_model_call instance @bs: binstream instance @is_addr_ro_variable: callback(addr, size) to test memory candidate """ diff --git a/miasm/analysis/disasm_cb.py b/miasm/analysis/disasm_cb.py index af47603b..76fa738b 100644 --- a/miasm/analysis/disasm_cb.py +++ b/miasm/analysis/disasm_cb.py @@ -11,26 +11,26 @@ from miasm.core.locationdb import LocationDB from miasm.core.utils import upck32 -def get_ira(arch, attrib): +def get_lifter_model_call(arch, attrib): arch = arch.name, attrib if arch == ("arm", "arm"): - from miasm.arch.arm.ira import ir_a_arm_base as ira + from miasm.arch.arm.lifter_model_call import ir_a_arm_base as lifter_model_call elif arch == ("x86", 32): - from miasm.arch.x86.ira import ir_a_x86_32 as ira + from miasm.arch.x86.lifter_model_call import ir_a_x86_32 as lifter_model_call elif arch == ("x86", 64): - from miasm.arch.x86.ira import ir_a_x86_64 as ira + from miasm.arch.x86.lifter_model_call import ir_a_x86_64 as lifter_model_call else: raise ValueError('unknown architecture: %s' % arch.name) - return ira + return lifter_model_call def arm_guess_subcall(dis_engine, cur_block, offsets_to_dis): arch = dis_engine.arch loc_db = dis_engine.loc_db - ira = get_ira(arch, dis_engine.attrib) + lifter_model_call = get_lifter_model_call(arch, dis_engine.attrib) - ir_arch = ira(loc_db) - ircfg = ira.new_ircfg() + ir_arch = lifter_model_call(loc_db) + ircfg = lifter_model_call.new_ircfg() print('###') print(cur_block) ir_arch.add_asmblock_to_ircfg(cur_block, ircfg) @@ -66,13 +66,13 @@ def arm_guess_subcall(dis_engine, cur_block, offsets_to_dis): def arm_guess_jump_table(dis_engine, cur_block, offsets_to_dis): arch = dis_engine.arch loc_db = dis_engine.loc_db - ira = get_ira(arch, dis_engine.attrib) + lifter_model_call = get_lifter_model_call(arch, dis_engine.attrib) jra = ExprId('jra') jrb = ExprId('jrb') - ir_arch = ira(loc_db) - ircfg = ira.new_ircfg() + ir_arch = lifter_model_call(loc_db) + ircfg = lifter_model_call.new_ircfg() ir_arch.add_asmblock_to_ircfg(cur_block, ircfg) for irblock in viewvalues(ircfg.blocks): diff --git a/miasm/analysis/dse.py b/miasm/analysis/dse.py index cfd13821..c90f30ef 100644 --- a/miasm/analysis/dse.py +++ b/miasm/analysis/dse.py @@ -167,8 +167,8 @@ class DSEEngine(object): self.handler = {} # addr -> callback(DSEEngine instance) self.instrumentation = {} # addr -> callback(DSEEngine instance) self.addr_to_cacheblocks = {} # addr -> {label -> IRBlock} - self.ir_arch = self.machine.ir(loc_db=self.loc_db) # corresponding IR - self.ircfg = self.ir_arch.new_ircfg() # corresponding IR + self.lifter = self.machine.lifter(loc_db=self.loc_db) # corresponding IR + self.ircfg = self.lifter.new_ircfg() # corresponding IR # Defined after attachment self.jitter = None # Jitload (concrete execution) @@ -186,17 +186,17 @@ class DSEEngine(object): # Symbexec engine ## Prepare symbexec engines self.symb = self.SYMB_ENGINE(self.jitter.cpu, self.jitter.vm, - self.ir_arch, {}) + self.lifter, {}) self.symb.enable_emulated_simplifications() self.symb_concrete = ESENoVMSideEffects( self.jitter.cpu, self.jitter.vm, - self.ir_arch, {} + self.lifter, {} ) ## Update registers value - self.symb.symbols[self.ir_arch.IRDst] = ExprInt( - getattr(self.jitter.cpu, self.ir_arch.pc.name), - self.ir_arch.IRDst.size + self.symb.symbols[self.lifter.IRDst] = ExprInt( + getattr(self.jitter.cpu, self.lifter.pc.name), + self.lifter.IRDst.size ) # Activate callback on each instr @@ -288,7 +288,7 @@ class DSEEngine(object): for symbol in self.symb.modified_expr: # Do not consider PC - if symbol in [self.ir_arch.pc, self.ir_arch.IRDst]: + if symbol in [self.lifter.pc, self.lifter.IRDst]: continue # Consider only concrete values @@ -324,7 +324,7 @@ class DSEEngine(object): # Call callbacks associated to the current address cur_addr = self.jitter.pc if isinstance(cur_addr, LocKey): - lbl = self.ir_arch.loc_db.loc_key_to_label(cur_addr) + lbl = self.lifter.loc_db.loc_key_to_label(cur_addr) cur_addr = lbl.offset if cur_addr in self.handler: @@ -335,7 +335,7 @@ class DSEEngine(object): self.instrumentation[cur_addr](self) # Handle current address - self.handle(ExprInt(cur_addr, self.ir_arch.IRDst.size)) + self.handle(ExprInt(cur_addr, self.lifter.IRDst.size)) # Avoid memory issue in ExpressionSimplifier if len(self.symb.expr_simp.cache) > 100000: @@ -352,7 +352,7 @@ class DSEEngine(object): ## Update current state asm_block = self.mdis.dis_block(cur_addr) - self.ir_arch.add_asmblock_to_ircfg(asm_block, self.ircfg) + self.lifter.add_asmblock_to_ircfg(asm_block, self.ircfg) self.addr_to_cacheblocks[cur_addr] = dict(self.ircfg.blocks) # Emulate the current instruction @@ -379,7 +379,7 @@ class DSEEngine(object): self.symb.run_block_at(self.ircfg, cur_addr) if not (isinstance(next_addr_concrete, ExprLoc) and - self.ir_arch.loc_db.get_location_offset( + self.lifter.loc_db.get_location_offset( next_addr_concrete.loc_key ) is None): # Not a lbl_gen, exit @@ -400,7 +400,7 @@ class DSEEngine(object): This version use the regs associated to the attrib (!= cpu.get_gpreg()) """ out = {} - regs = self.ir_arch.arch.regs.attrib_to_regs[self.ir_arch.attrib] + regs = self.lifter.arch.regs.attrib_to_regs[self.lifter.attrib] for reg in regs: if hasattr(self.jitter.cpu, reg.name): out[reg.name] = getattr(self.jitter.cpu, reg.name) @@ -432,7 +432,7 @@ class DSEEngine(object): ) # Restore registers - self.jitter.pc = snapshot["regs"][self.ir_arch.pc.name] + self.jitter.pc = snapshot["regs"][self.lifter.pc.name] for reg, value in viewitems(snapshot["regs"]): setattr(self.jitter.cpu, reg, value) @@ -460,7 +460,7 @@ class DSEEngine(object): # not present symbexec.symbols.symbols_mem.base_to_memarray.clear() if cpu: - regs = self.ir_arch.arch.regs.attrib_to_regs[self.ir_arch.attrib] + regs = self.lifter.arch.regs.attrib_to_regs[self.lifter.attrib] for reg in regs: if hasattr(self.jitter.cpu, reg.name): value = ExprInt(getattr(self.jitter.cpu, reg.name), @@ -638,17 +638,17 @@ class DSEPathConstraint(DSEEngine): self.cur_solver.add(self.z3_trans.from_expr(cons)) def handle(self, cur_addr): - cur_addr = canonize_to_exprloc(self.ir_arch.loc_db, cur_addr) - symb_pc = self.eval_expr(self.ir_arch.IRDst) + cur_addr = canonize_to_exprloc(self.lifter.loc_db, cur_addr) + symb_pc = self.eval_expr(self.lifter.IRDst) possibilities = possible_values(symb_pc) cur_path_constraint = set() # path_constraint for the concrete path if len(possibilities) == 1: dst = next(iter(possibilities)).value - dst = canonize_to_exprloc(self.ir_arch.loc_db, dst) + dst = canonize_to_exprloc(self.lifter.loc_db, dst) assert dst == cur_addr else: for possibility in possibilities: - target_addr = canonize_to_exprloc(self.ir_arch.loc_db, possibility.value) + target_addr = canonize_to_exprloc(self.lifter.loc_db, possibility.value) path_constraint = set() # Set of ExprAssign for the possible path # Get constraint associated to the possible path @@ -682,7 +682,7 @@ class DSEPathConstraint(DSEEngine): for start, stop in memory_to_add: for address in range(start, stop + 1): expr_mem = ExprMem(ExprInt(address, - self.ir_arch.pc.size), + self.lifter.pc.size), 8) value = self.eval_expr(expr_mem) if not value.is_int(): diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index ba076d8c..f9b26106 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -6,7 +6,7 @@ class Machine(object): __dis_engine = None # Disassembly engine __mn = None # Machine instance - __ira = None # IR analyser + __lifter_model_call = None # IR analyser __jitter = None # Jit engine __gdbserver = None # GdbServer handler @@ -19,7 +19,7 @@ class Machine(object): dis_engine = None mn = None - ira = None + lifter_model_call = None ir = None jitter = None gdbserver = None @@ -38,7 +38,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_arm - from miasm.arch.arm.ira import ir_a_arml as ira + from miasm.arch.arm.lifter_model_call import ir_a_arml as lifter_model_call from miasm.arch.arm.sem import ir_arml as ir elif machine_name == "armb": from miasm.arch.arm.disasm import dis_armb as dis_engine @@ -49,7 +49,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_arm - from miasm.arch.arm.ira import ir_a_armb as ira + from miasm.arch.arm.lifter_model_call import ir_a_armb as lifter_model_call from miasm.arch.arm.sem import ir_armb as ir elif machine_name == "aarch64l": from miasm.arch.aarch64.disasm import dis_aarch64l as dis_engine @@ -60,7 +60,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_aarch64 - from miasm.arch.aarch64.ira import ir_a_aarch64l as ira + from miasm.arch.aarch64.lifter_model_call import ir_a_aarch64l as lifter_model_call from miasm.arch.aarch64.sem import ir_aarch64l as ir elif machine_name == "aarch64b": from miasm.arch.aarch64.disasm import dis_aarch64b as dis_engine @@ -71,13 +71,13 @@ class Machine(object): except ImportError: pass mn = arch.mn_aarch64 - from miasm.arch.aarch64.ira import ir_a_aarch64b as ira + from miasm.arch.aarch64.lifter_model_call import ir_a_aarch64b as lifter_model_call from miasm.arch.aarch64.sem import ir_aarch64b as ir elif machine_name == "armtl": from miasm.arch.arm.disasm import dis_armtl as dis_engine from miasm.arch.arm import arch mn = arch.mn_armt - from miasm.arch.arm.ira import ir_a_armtl as ira + from miasm.arch.arm.lifter_model_call import ir_a_armtl as lifter_model_call from miasm.arch.arm.sem import ir_armtl as ir try: from miasm.arch.arm import jit @@ -88,7 +88,7 @@ class Machine(object): from miasm.arch.arm.disasm import dis_armtb as dis_engine from miasm.arch.arm import arch mn = arch.mn_armt - from miasm.arch.arm.ira import ir_a_armtb as ira + from miasm.arch.arm.lifter_model_call import ir_a_armtb as lifter_model_call from miasm.arch.arm.sem import ir_armtb as ir elif machine_name == "sh4": from miasm.arch.sh4 import arch @@ -102,7 +102,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_x86 - from miasm.arch.x86.ira import ir_a_x86_16 as ira + from miasm.arch.x86.lifter_model_call import ir_a_x86_16 as lifter_model_call from miasm.arch.x86.sem import ir_x86_16 as ir elif machine_name == "x86_32": from miasm.arch.x86.disasm import dis_x86_32 as dis_engine @@ -113,7 +113,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_x86 - from miasm.arch.x86.ira import ir_a_x86_32 as ira + from miasm.arch.x86.lifter_model_call import ir_a_x86_32 as lifter_model_call from miasm.arch.x86.sem import ir_x86_32 as ir try: from miasm.analysis.gdbserver import GdbServer_x86_32 as gdbserver @@ -128,7 +128,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_x86 - from miasm.arch.x86.ira import ir_a_x86_64 as ira + from miasm.arch.x86.lifter_model_call import ir_a_x86_64 as lifter_model_call from miasm.arch.x86.sem import ir_x86_64 as ir elif machine_name == "msp430": from miasm.arch.msp430.disasm import dis_msp430 as dis_engine @@ -139,7 +139,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_msp430 - from miasm.arch.msp430.ira import ir_a_msp430 as ira + from miasm.arch.msp430.lifter_model_call import ir_a_msp430 as lifter_model_call from miasm.arch.msp430.sem import ir_msp430 as ir try: from miasm.analysis.gdbserver import GdbServer_msp430 as gdbserver @@ -154,7 +154,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_mips32 - from miasm.arch.mips32.ira import ir_a_mips32b as ira + from miasm.arch.mips32.lifter_model_call import ir_a_mips32b as lifter_model_call from miasm.arch.mips32.sem import ir_mips32b as ir elif machine_name == "mips32l": from miasm.arch.mips32.disasm import dis_mips32l as dis_engine @@ -165,7 +165,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_mips32 - from miasm.arch.mips32.ira import ir_a_mips32l as ira + from miasm.arch.mips32.lifter_model_call import ir_a_mips32l as lifter_model_call from miasm.arch.mips32.sem import ir_mips32l as ir elif machine_name == "ppc32b": from miasm.arch.ppc.disasm import dis_ppc32b as dis_engine @@ -176,7 +176,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_ppc - from miasm.arch.ppc.ira import ir_a_ppc32b as ira + from miasm.arch.ppc.lifter_model_call import ir_a_ppc32b as lifter_model_call from miasm.arch.ppc.sem import ir_ppc32b as ir elif machine_name == "mepb": from miasm.arch.mep.disasm import dis_mepb as dis_engine @@ -187,7 +187,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_mep - from miasm.arch.mep.ira import ir_a_mepb as ira + from miasm.arch.mep.lifter_model_call import ir_a_mepb as lifter_model_call from miasm.arch.mep.sem import ir_mepb as ir elif machine_name == "mepl": from miasm.arch.mep.disasm import dis_mepl as dis_engine @@ -198,7 +198,7 @@ class Machine(object): except ImportError: pass mn = arch.mn_mep - from miasm.arch.mep.ira import ir_a_mepl as ira + from miasm.arch.mep.lifter_model_call import ir_a_mepl as lifter_model_call from miasm.arch.mep.sem import ir_mepl as ir else: raise ValueError('Unknown machine: %s' % machine_name) @@ -210,7 +210,7 @@ class Machine(object): self.__dis_engine = dis_engine self.__mn = mn - self.__ira = ira + self.__lifter_model_call = lifter_model_call self.__jitter = jitter self.__gdbserver = gdbserver self.__log_jit = log_jit @@ -228,8 +228,12 @@ class Machine(object): return self.__mn @property - def ira(self): - return self.__ira + def lifter(self): + return self.__lifter + + @property + def lifter_model_call(self): + return self.__lifter_model_call @property def ir(self): diff --git a/miasm/analysis/simplifier.py b/miasm/analysis/simplifier.py index 43623476..fd053b26 100644 --- a/miasm/analysis/simplifier.py +++ b/miasm/analysis/simplifier.py @@ -46,8 +46,8 @@ class IRCFGSimplifier(object): This class applies passes until reaching a fix point """ - def __init__(self, ir_arch): - self.ir_arch = ir_arch + def __init__(self, lifter): + self.lifter = lifter self.init_passes() def init_passes(self): @@ -81,10 +81,10 @@ class IRCFGSimplifierCommon(IRCFGSimplifier): - simplify_ircfg - do_dead_simp_ircfg """ - def __init__(self, ir_arch, expr_simp=expr_simp): + def __init__(self, lifter, expr_simp=expr_simp): self.expr_simp = expr_simp - super(IRCFGSimplifierCommon, self).__init__(ir_arch) - self.deadremoval = DeadRemoval(self.ir_arch) + super(IRCFGSimplifierCommon, self).__init__(lifter) + self.deadremoval = DeadRemoval(self.lifter) def init_passes(self): self.passes = [ @@ -133,10 +133,10 @@ class IRCFGSimplifierSSA(IRCFGSimplifierCommon): - do_dead_simp_ssa """ - def __init__(self, ir_arch, expr_simp=expr_simp): - super(IRCFGSimplifierSSA, self).__init__(ir_arch, expr_simp) + def __init__(self, lifter, expr_simp=expr_simp): + super(IRCFGSimplifierSSA, self).__init__(lifter, expr_simp) - self.ir_arch.ssa_var = {} + self.lifter.ssa_var = {} self.all_ssa_vars = {} self.ssa_forbidden_regs = self.get_forbidden_regs() @@ -144,7 +144,7 @@ class IRCFGSimplifierSSA(IRCFGSimplifierCommon): self.propag_expressions = PropagateExpressions() self.del_dummy_phi = DelDummyPhi() - self.deadremoval = DeadRemoval(self.ir_arch, self.all_ssa_vars) + self.deadremoval = DeadRemoval(self.lifter, self.all_ssa_vars) def get_forbidden_regs(self): """ @@ -152,9 +152,9 @@ class IRCFGSimplifierSSA(IRCFGSimplifierCommon): """ regs = set( [ - self.ir_arch.pc, - self.ir_arch.IRDst, - self.ir_arch.arch.regs.exception_flags + self.lifter.pc, + self.lifter.IRDst, + self.lifter.arch.regs.exception_flags ] ) return regs @@ -187,7 +187,7 @@ class IRCFGSimplifierSSA(IRCFGSimplifierCommon): ssa.ssa_variable_to_expr.update(self.all_ssa_vars) ssa.transform(head) self.all_ssa_vars.update(ssa.ssa_variable_to_expr) - self.ir_arch.ssa_var.update(ssa.ssa_variable_to_expr) + self.lifter.ssa_var.update(ssa.ssa_variable_to_expr) return ssa def ssa_to_unssa(self, ssa, head): @@ -198,7 +198,7 @@ class IRCFGSimplifierSSA(IRCFGSimplifierCommon): @head: Location instance of the graph head """ cfg_liveness = DiGraphLivenessSSA(ssa.graph) - cfg_liveness.init_var_info(self.ir_arch) + cfg_liveness.init_var_info(self.lifter) cfg_liveness.compute_liveness() UnSSADiGraph(ssa, head, cfg_liveness) @@ -331,7 +331,7 @@ class IRCFGSimplifierSSA(IRCFGSimplifierCommon): ssa = self.ircfg_to_ssa(ircfg, head) ssa = self.do_simplify_loop(ssa, head) ircfg = self.ssa_to_unssa(ssa, head) - ircfg_simplifier = IRCFGSimplifierCommon(self.ir_arch) + ircfg_simplifier = IRCFGSimplifierCommon(self.lifter) ircfg_simplifier.deadremoval.add_expr_to_original_expr(self.all_ssa_vars) ircfg_simplifier.simplify(ircfg, head) return ircfg diff --git a/miasm/arch/aarch64/ira.py b/miasm/arch/aarch64/ira.py index aded3dd1..13c49943 100644 --- a/miasm/arch/aarch64/ira.py +++ b/miasm/arch/aarch64/ira.py @@ -1,17 +1,17 @@ #-*- coding:utf-8 -*- -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.arch.aarch64.sem import ir_aarch64l, ir_aarch64b -class ir_a_aarch64l_base(ir_aarch64l, ira): +class ir_a_aarch64l_base(ir_aarch64l, LifterModelCall): def __init__(self, loc_db): ir_aarch64l.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 -class ir_a_aarch64b_base(ir_aarch64b, ira): +class ir_a_aarch64b_base(ir_aarch64b, LifterModelCall): def __init__(self, loc_db): ir_aarch64b.__init__(self, loc_db) diff --git a/miasm/arch/arm/ira.py b/miasm/arch/arm/ira.py index f2d8d44b..2f47ea37 100644 --- a/miasm/arch/arm/ira.py +++ b/miasm/arch/arm/ira.py @@ -1,17 +1,17 @@ #-*- coding:utf-8 -*- -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock from miasm.arch.arm.sem import ir_arml, ir_armtl, ir_armb, ir_armtb, tab_cond from miasm.expression.expression import ExprAssign, ExprOp, ExprLoc, ExprCond from miasm.ir.ir import AssignBlock -class ir_a_arml_base(ir_arml, ira): +class ir_a_arml_base(ir_arml, LifterModelCall): def __init__(self, loc_db): ir_arml.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 -class ir_a_armb_base(ir_armb, ira): +class ir_a_armb_base(ir_armb, LifterModelCall): def __init__(self, loc_db): ir_armb.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 diff --git a/miasm/arch/mep/ira.py b/miasm/arch/mep/ira.py index eac4f6e9..e1420168 100644 --- a/miasm/arch/mep/ira.py +++ b/miasm/arch/mep/ira.py @@ -2,10 +2,10 @@ # Guillaume Valadon <guillaume@valadon.net> from miasm.arch.mep.sem import ir_mepb, ir_mepl -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall -class ir_a_mepb(ir_mepb, ira): +class ir_a_mepb(ir_mepb, LifterModelCall): """MeP high level IR manipulations - Big Endian Notes: diff --git a/miasm/arch/mips32/ira.py b/miasm/arch/mips32/ira.py index e57e3a36..d7c2af17 100644 --- a/miasm/arch/mips32/ira.py +++ b/miasm/arch/mips32/ira.py @@ -2,10 +2,10 @@ from miasm.expression.expression import ExprAssign, ExprOp from miasm.ir.ir import IRBlock, AssignBlock -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.arch.mips32.sem import ir_mips32l, ir_mips32b -class ir_a_mips32l(ir_mips32l, ira): +class ir_a_mips32l(ir_mips32l, LifterModelCall): def __init__(self, loc_db): ir_mips32l.__init__(self, loc_db) self.ret_reg = self.arch.regs.V0 diff --git a/miasm/arch/msp430/ira.py b/miasm/arch/msp430/ira.py index 264de12c..a983f2e1 100644 --- a/miasm/arch/msp430/ira.py +++ b/miasm/arch/msp430/ira.py @@ -1,11 +1,11 @@ #-*- coding:utf-8 -*- -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.arch.msp430.sem import ir_msp430 from miasm.ir.ir import AssignBlock from miasm.expression.expression import * -class ir_a_msp430_base(ir_msp430, ira): +class ir_a_msp430_base(ir_msp430, LifterModelCall): def __init__(self, loc_db): ir_msp430.__init__(self, loc_db) diff --git a/miasm/arch/ppc/ira.py b/miasm/arch/ppc/ira.py index 72bf7d7c..aae6de83 100644 --- a/miasm/arch/ppc/ira.py +++ b/miasm/arch/ppc/ira.py @@ -1,10 +1,10 @@ from miasm.expression.expression import ExprAssign, ExprOp from miasm.ir.ir import AssignBlock -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.arch.ppc.sem import ir_ppc32b -class ir_a_ppc32b(ir_ppc32b, ira): +class ir_a_ppc32b(ir_ppc32b, LifterModelCall): def __init__(self, loc_db, *args): super(ir_a_ppc32b, self).__init__(loc_db, *args) diff --git a/miasm/arch/x86/ira.py b/miasm/arch/x86/ira.py index 1615622b..5022ed6e 100644 --- a/miasm/arch/x86/ira.py +++ b/miasm/arch/x86/ira.py @@ -2,11 +2,11 @@ from miasm.expression.expression import ExprAssign, ExprOp from miasm.ir.ir import AssignBlock -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 -class ir_a_x86_16(ir_x86_16, ira): +class ir_a_x86_16(ir_x86_16, LifterModelCall): def __init__(self, loc_db): ir_x86_16.__init__(self, loc_db) diff --git a/miasm/ir/analysis.py b/miasm/ir/analysis.py index ada4f281..aee7fab7 100644 --- a/miasm/ir/analysis.py +++ b/miasm/ir/analysis.py @@ -14,7 +14,7 @@ log.addHandler(console_handler) log.setLevel(logging.WARNING) -class ira(Lifter): +class LifterModelCall(Lifter): """IR Analysis This class provides higher level manipulations on IR, such as dead instruction removals. @@ -23,7 +23,7 @@ class ira(Lifter): `miasm.ir.ir::Lifter` class. For instance: - class ira_x86_16(ir_x86_16, ira) + class LifterModelCall_x86_16(ir_x86_16, LifterModelCall) """ ret_reg = None diff --git a/miasm/jitter/llvmconvert.py b/miasm/jitter/llvmconvert.py index 5aae624b..d2210a4d 100644 --- a/miasm/jitter/llvmconvert.py +++ b/miasm/jitter/llvmconvert.py @@ -221,10 +221,10 @@ class LLVMContext_JIT(LLVMContext): """Extend LLVMContext_JIT in order to handle memory management and custom operations""" - def __init__(self, library_filenames, ir_arch, name="mod"): + def __init__(self, library_filenames, lifter, name="mod"): "Init a LLVMContext object, and load the mem management shared library" self.library_filenames = library_filenames - self.ir_arch = ir_arch + self.lifter = lifter self.arch_specific() self.load_libraries() LLVMContext.__init__(self, name) @@ -256,12 +256,12 @@ class LLVMContext_JIT(LLVMContext): self.add_log_functions() def arch_specific(self): - arch = self.ir_arch.arch + arch = self.lifter.arch if arch.name == "x86": self.PC = arch.regs.RIP - self.logging_func = "dump_gpregs_%d" % self.ir_arch.attrib + self.logging_func = "dump_gpregs_%d" % self.lifter.attrib else: - self.PC = self.ir_arch.pc + self.PC = self.lifter.pc self.logging_func = "dump_gpregs" if arch.name == "mips32": from miasm.arch.mips32.jit import mipsCGen @@ -774,7 +774,7 @@ class LLVMFunction(object): return ret if expr.is_loc(): - offset = self.llvm_context.ir_arch.loc_db.get_location_offset( + offset = self.llvm_context.lifter.loc_db.get_location_offset( expr.loc_key ) ret = llvm_ir.Constant(LLVMType.IntType(expr.size), offset) @@ -1365,7 +1365,7 @@ class LLVMFunction(object): # Get exception flag value builder = self.builder - m2_exception_flag = self.llvm_context.ir_arch.arch.regs.exception_flags + m2_exception_flag = self.llvm_context.lifter.arch.regs.exception_flags t_size = LLVMType.IntType(m2_exception_flag.size) exceptionflag = self.add_ir(m2_exception_flag) @@ -1411,7 +1411,7 @@ class LLVMFunction(object): def gen_pre_code(self, instr_attrib): if instr_attrib.log_mn: - loc_db = self.llvm_context.ir_arch.loc_db + loc_db = self.llvm_context.lifter.loc_db self.printf( "%.8X %s\n" % ( instr_attrib.instr.offset, @@ -1489,13 +1489,13 @@ class LLVMFunction(object): offset = None if isinstance(dst, ExprInt): offset = int(dst) - loc_key = self.llvm_context.ir_arch.loc_db.get_or_create_offset_location(offset) + loc_key = self.llvm_context.lifter.loc_db.get_or_create_offset_location(offset) dst = ExprLoc(loc_key, dst.size) if isinstance(dst, ExprLoc): loc_key = dst.loc_key bbl = self.get_basic_block_by_loc_key(loc_key) - offset = self.llvm_context.ir_arch.loc_db.get_location_offset(loc_key) + offset = self.llvm_context.lifter.loc_db.get_location_offset(loc_key) if bbl is not None: # "local" jump, inside this function if offset is None: @@ -1557,7 +1557,7 @@ class LLVMFunction(object): # Evaluate expressions values = {} for dst, src in viewitems(assignblk): - if dst == self.llvm_context.ir_arch.IRDst: + if dst == self.llvm_context.lifter.IRDst: case2dst, case_value = self.expr2cases(src) else: values[dst] = self.add_ir(src) @@ -1629,7 +1629,7 @@ class LLVMFunction(object): Translate an asm_bad_block into a CPU exception """ builder = self.builder - m2_exception_flag = self.llvm_context.ir_arch.arch.regs.exception_flags + m2_exception_flag = self.llvm_context.lifter.arch.regs.exception_flags t_size = LLVMType.IntType(m2_exception_flag.size) self.assign( self.add_ir(ExprInt(1, 8)), @@ -1639,7 +1639,7 @@ class LLVMFunction(object): t_size(m2_csts.EXCEPT_UNK_MNEMO), m2_exception_flag ) - offset = self.llvm_context.ir_arch.loc_db.get_location_offset( + offset = self.llvm_context.lifter.loc_db.get_location_offset( asmblock.loc_key ) self.set_ret(LLVMType.IntType(64)(offset)) @@ -1689,7 +1689,7 @@ class LLVMFunction(object): # Else Block builder.position_at_end(else_block) PC = self.llvm_context.PC - next_label_offset = self.llvm_context.ir_arch.loc_db.get_location_offset(next_label) + next_label_offset = self.llvm_context.lifter.loc_db.get_location_offset(next_label) to_ret = LLVMType.IntType(PC.size)(next_label_offset) self.assign(to_ret, PC) self.set_ret(to_ret) @@ -1726,11 +1726,11 @@ class LLVMFunction(object): # Create basic blocks (for label branches) entry_bbl, builder = self.entry_bbl, self.builder for instr in asmblock.lines: - lbl = self.llvm_context.ir_arch.loc_db.get_or_create_offset_location(instr.offset) + lbl = self.llvm_context.lifter.loc_db.get_or_create_offset_location(instr.offset) self.append_basic_block(lbl) # TODO: merge duplicate code with CGen - codegen = self.llvm_context.cgen_class(self.llvm_context.ir_arch) + codegen = self.llvm_context.cgen_class(self.llvm_context.lifter) irblocks_list = codegen.block2assignblks(asmblock) instr_offsets = [line.offset for line in asmblock.lines] @@ -1744,7 +1744,7 @@ class LLVMFunction(object): ) self.local_vars_pointers[element.name] = ptr loc_key = codegen.get_block_post_label(asmblock) - offset = self.llvm_context.ir_arch.loc_db.get_location_offset(loc_key) + offset = self.llvm_context.lifter.loc_db.get_location_offset(loc_key) instr_offsets.append(offset) self.append_basic_block(loc_key) @@ -1766,8 +1766,8 @@ class LLVMFunction(object): # Generate the corresponding code for index, irblock in enumerate(irblocks): - new_irblock = self.llvm_context.ir_arch.irbloc_fix_regs_for_mode( - irblock, self.llvm_context.ir_arch.attrib) + new_irblock = self.llvm_context.lifter.irbloc_fix_regs_for_mode( + irblock, self.llvm_context.lifter.attrib) # Set the builder at the beginning of the correct bbl self.builder.position_at_end(self.get_basic_block_by_loc_key(new_irblock.loc_key)) @@ -1848,7 +1848,7 @@ class LLVMFunction_IRCompilation(LLVMFunction): Example of use: >>> context = LLVMContext_IRCompilation() - >>> context.ir_arch = ir + >>> context.lifter = lifter >>> >>> func = LLVMFunction_IRCompilation(context, name="test") >>> func.ret_type = llvm_ir.VoidType() @@ -1866,7 +1866,7 @@ class LLVMFunction_IRCompilation(LLVMFunction): super(LLVMFunction_IRCompilation, self).init_fc() # Create a global IRDst if not any - IRDst = self.llvm_context.ir_arch.IRDst + IRDst = self.llvm_context.lifter.IRDst if str(IRDst) not in self.mod.globals: llvm_ir.GlobalVariable(self.mod, LLVMType.IntType(IRDst.size), name=str(IRDst)) @@ -1879,7 +1879,7 @@ class LLVMFunction_IRCompilation(LLVMFunction): if isinstance(dst, Expr): if dst.is_int(): - loc = self.llvm_context.ir_arch.loc_db.getby_offset_create(int(dst)) + loc = self.llvm_context.lifter.loc_db.getby_offset_create(int(dst)) dst = ExprLoc(loc, dst.size) assert dst.is_loc() bbl = self.get_basic_block_by_loc_key(dst.loc_key) diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py index 840bf9ce..6a3c2ce7 100644 --- a/test/analysis/data_flow.py +++ b/test/analysis/data_flow.py @@ -6,7 +6,7 @@ from future.utils import viewitems from miasm.expression.expression import ExprId, ExprInt, ExprAssign, ExprMem from miasm.core.locationdb import LocationDB from miasm.analysis.data_flow import DeadRemoval, ReachingDefinitions, DiGraphDefUse -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock, AssignBlock loc_db = LocationDB() @@ -68,99 +68,99 @@ class Arch(object): def getsp(self, _): return sp -class IRATest(ira): +class LifterTest(LifterModelCall): - """Fake IRA class for tests""" + """Fake Lifter class for tests""" def __init__(self, loc_db): arch = Arch() - super(IRATest, self).__init__(arch, 32, loc_db) + super(LifterTest, self).__init__(arch, 32, loc_db) self.IRDst = IRDst self.ret_reg = r def get_out_regs(self, _): return set([self.ret_reg, self.sp]) -IRA = IRATest(loc_db) -deadrm = DeadRemoval(IRA) +Lifter = LifterTest(loc_db) +deadrm = DeadRemoval(Lifter) # graph 1 : Simple graph with dead and alive variables -G1_IRA = IRA.new_ircfg() +G1_cfg = Lifter.new_ircfg() G1_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST2)]]) G1_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, b)]]) G1_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G1_IRB0, G1_IRB1, G1_IRB2]: - G1_IRA.add_irblock(irb) + G1_cfg.add_irblock(irb) -G1_IRA.add_uniq_edge(G1_IRB0.loc_key, G1_IRB1.loc_key) -G1_IRA.add_uniq_edge(G1_IRB1.loc_key, G1_IRB2.loc_key) +G1_cfg.add_uniq_edge(G1_IRB0.loc_key, G1_IRB1.loc_key) +G1_cfg.add_uniq_edge(G1_IRB1.loc_key, G1_IRB2.loc_key) # Expected output for graph 1 -G1_EXP_IRA = IRA.new_ircfg() +G1_EXP_cfg = Lifter.new_ircfg() G1_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(b, CST2)]]) G1_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, b)]]) G1_EXP_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G1_EXP_IRB0, G1_EXP_IRB1, G1_EXP_IRB2]: - G1_EXP_IRA.add_irblock(irb) + G1_EXP_cfg.add_irblock(irb) # graph 2 : Natural loop with dead variable -G2_IRA = IRA.new_ircfg() +G2_cfg = Lifter.new_ircfg() G2_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(r, CST1)]]) G2_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) G2_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, r)]]) for irb in [G2_IRB0, G2_IRB1, G2_IRB2]: - G2_IRA.add_irblock(irb) + G2_cfg.add_irblock(irb) -G2_IRA.add_uniq_edge(G2_IRB0.loc_key, G2_IRB1.loc_key) -G2_IRA.add_uniq_edge(G2_IRB1.loc_key, G2_IRB2.loc_key) -G2_IRA.add_uniq_edge(G2_IRB1.loc_key, G2_IRB1.loc_key) +G2_cfg.add_uniq_edge(G2_IRB0.loc_key, G2_IRB1.loc_key) +G2_cfg.add_uniq_edge(G2_IRB1.loc_key, G2_IRB2.loc_key) +G2_cfg.add_uniq_edge(G2_IRB1.loc_key, G2_IRB1.loc_key) # Expected output for graph 2 -G2_EXP_IRA = IRA.new_ircfg() +G2_EXP_cfg = Lifter.new_ircfg() G2_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(r, CST1)]]) G2_EXP_IRB1 = gen_irblock(LBL1, [[]]) G2_EXP_IRB2 = gen_irblock(LBL2, [[]]) for irb in [G2_EXP_IRB0, G2_EXP_IRB1, G2_EXP_IRB2]: - G2_EXP_IRA.add_irblock(irb) + G2_EXP_cfg.add_irblock(irb) # graph 3 : Natural loop with alive variables -G3_IRA = IRA.new_ircfg() +G3_cfg = Lifter.new_ircfg() G3_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G3_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) G3_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G3_IRB0, G3_IRB1, G3_IRB2]: - G3_IRA.add_irblock(irb) + G3_cfg.add_irblock(irb) -G3_IRA.add_uniq_edge(G3_IRB0.loc_key, G3_IRB1.loc_key) -G3_IRA.add_uniq_edge(G3_IRB1.loc_key, G3_IRB2.loc_key) -G3_IRA.add_uniq_edge(G3_IRB1.loc_key, G3_IRB1.loc_key) +G3_cfg.add_uniq_edge(G3_IRB0.loc_key, G3_IRB1.loc_key) +G3_cfg.add_uniq_edge(G3_IRB1.loc_key, G3_IRB2.loc_key) +G3_cfg.add_uniq_edge(G3_IRB1.loc_key, G3_IRB1.loc_key) # Expected output for graph 3 -G3_EXP_IRA = IRA.new_ircfg() +G3_EXP_cfg = Lifter.new_ircfg() G3_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G3_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) G3_EXP_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G3_EXP_IRB0, G3_EXP_IRB1, G3_EXP_IRB2]: - G3_EXP_IRA.add_irblock(irb) + G3_EXP_cfg.add_irblock(irb) # graph 4 : If/else with dead variables -G4_IRA = IRA.new_ircfg() +G4_cfg = Lifter.new_ircfg() G4_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G4_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) @@ -168,15 +168,15 @@ G4_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, a+CST2)]]) G4_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, CST3)], [ExprAssign(r, a)]]) for irb in [G4_IRB0, G4_IRB1, G4_IRB2, G4_IRB3]: - G4_IRA.add_irblock(irb) + G4_cfg.add_irblock(irb) -G4_IRA.add_uniq_edge(G4_IRB0.loc_key, G4_IRB1.loc_key) -G4_IRA.add_uniq_edge(G4_IRB0.loc_key, G4_IRB2.loc_key) -G4_IRA.add_uniq_edge(G4_IRB1.loc_key, G4_IRB3.loc_key) -G4_IRA.add_uniq_edge(G4_IRB2.loc_key, G4_IRB3.loc_key) +G4_cfg.add_uniq_edge(G4_IRB0.loc_key, G4_IRB1.loc_key) +G4_cfg.add_uniq_edge(G4_IRB0.loc_key, G4_IRB2.loc_key) +G4_cfg.add_uniq_edge(G4_IRB1.loc_key, G4_IRB3.loc_key) +G4_cfg.add_uniq_edge(G4_IRB2.loc_key, G4_IRB3.loc_key) # Expected output for graph 4 -G4_EXP_IRA = IRA.new_ircfg() +G4_EXP_cfg = Lifter.new_ircfg() G4_EXP_IRB0 = gen_irblock(LBL0, [[]]) G4_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -184,11 +184,11 @@ G4_EXP_IRB2 = gen_irblock(LBL2, [[]]) G4_EXP_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, CST3)], [ExprAssign(r, a)]]) for irb in [G4_EXP_IRB0, G4_EXP_IRB1, G4_EXP_IRB2, G4_EXP_IRB3]: - G4_EXP_IRA.add_irblock(irb) + G4_EXP_cfg.add_irblock(irb) # graph 5 : Loop and If/else with dead variables -G5_IRA = IRA.new_ircfg() +G5_cfg = Lifter.new_ircfg() G5_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G5_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -198,18 +198,18 @@ G5_IRB4 = gen_irblock(LBL4, [[ExprAssign(a, a+CST1)]]) G5_IRB5 = gen_irblock(LBL5, [[ExprAssign(a, r)]]) for irb in [G5_IRB0, G5_IRB1, G5_IRB2, G5_IRB3, G5_IRB4, G5_IRB5]: - G5_IRA.add_irblock(irb) + G5_cfg.add_irblock(irb) -G5_IRA.add_uniq_edge(G5_IRB0.loc_key, G5_IRB1.loc_key) -G5_IRA.add_uniq_edge(G5_IRB1.loc_key, G5_IRB2.loc_key) -G5_IRA.add_uniq_edge(G5_IRB1.loc_key, G5_IRB3.loc_key) -G5_IRA.add_uniq_edge(G5_IRB2.loc_key, G5_IRB4.loc_key) -G5_IRA.add_uniq_edge(G5_IRB3.loc_key, G5_IRB4.loc_key) -G5_IRA.add_uniq_edge(G5_IRB4.loc_key, G5_IRB5.loc_key) -G5_IRA.add_uniq_edge(G5_IRB4.loc_key, G5_IRB1.loc_key) +G5_cfg.add_uniq_edge(G5_IRB0.loc_key, G5_IRB1.loc_key) +G5_cfg.add_uniq_edge(G5_IRB1.loc_key, G5_IRB2.loc_key) +G5_cfg.add_uniq_edge(G5_IRB1.loc_key, G5_IRB3.loc_key) +G5_cfg.add_uniq_edge(G5_IRB2.loc_key, G5_IRB4.loc_key) +G5_cfg.add_uniq_edge(G5_IRB3.loc_key, G5_IRB4.loc_key) +G5_cfg.add_uniq_edge(G5_IRB4.loc_key, G5_IRB5.loc_key) +G5_cfg.add_uniq_edge(G5_IRB4.loc_key, G5_IRB1.loc_key) # Expected output for graph 5 -G5_EXP_IRA = IRA.new_ircfg() +G5_EXP_cfg = Lifter.new_ircfg() G5_EXP_IRB0 = gen_irblock(LBL0, [[]]) G5_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -220,12 +220,12 @@ G5_EXP_IRB5 = gen_irblock(LBL5, [[]]) for irb in [G5_EXP_IRB0, G5_EXP_IRB1, G5_EXP_IRB2, G5_EXP_IRB3, G5_EXP_IRB4, G5_EXP_IRB5]: - G5_EXP_IRA.add_irblock(irb) + G5_EXP_cfg.add_irblock(irb) # graph 6 : Natural loop with dead variables symmetric assignment # (a = b <-> b = a ) -G6_IRA = IRA.new_ircfg() +G6_cfg = Lifter.new_ircfg() G6_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G6_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -233,15 +233,15 @@ G6_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, b)]]) G6_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST2)]]) for irb in [G6_IRB0, G6_IRB1, G6_IRB2, G6_IRB3]: - G6_IRA.add_irblock(irb) + G6_cfg.add_irblock(irb) -G6_IRA.add_uniq_edge(G6_IRB0.loc_key, G6_IRB1.loc_key) -G6_IRA.add_uniq_edge(G6_IRB1.loc_key, G6_IRB2.loc_key) -G6_IRA.add_uniq_edge(G6_IRB2.loc_key, G6_IRB1.loc_key) -G6_IRA.add_uniq_edge(G6_IRB2.loc_key, G6_IRB3.loc_key) +G6_cfg.add_uniq_edge(G6_IRB0.loc_key, G6_IRB1.loc_key) +G6_cfg.add_uniq_edge(G6_IRB1.loc_key, G6_IRB2.loc_key) +G6_cfg.add_uniq_edge(G6_IRB2.loc_key, G6_IRB1.loc_key) +G6_cfg.add_uniq_edge(G6_IRB2.loc_key, G6_IRB3.loc_key) # Expected output for graph 6 -G6_EXP_IRA = IRA.new_ircfg() +G6_EXP_cfg = Lifter.new_ircfg() G6_EXP_IRB0 = gen_irblock(LBL0, [[]]) G6_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -249,11 +249,11 @@ G6_EXP_IRB2 = gen_irblock(LBL2, [[]]) G6_EXP_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST2)]]) for irb in [G6_EXP_IRB0, G6_EXP_IRB1, G6_EXP_IRB2, G6_EXP_IRB3]: - G6_EXP_IRA.add_irblock(irb) + G6_EXP_cfg.add_irblock(irb) # graph 7 : Double entry loop with dead variables -G7_IRA = IRA.new_ircfg() +G7_cfg = Lifter.new_ircfg() G7_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(r, CST1)]]) G7_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) @@ -261,17 +261,17 @@ G7_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, a+CST2)]]) G7_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, r)]]) for irb in [G7_IRB0, G7_IRB1, G7_IRB2, G7_IRB3]: - G7_IRA.add_irblock(irb) + G7_cfg.add_irblock(irb) -G7_IRA.add_uniq_edge(G7_IRB0.loc_key, G7_IRB1.loc_key) -G7_IRA.add_uniq_edge(G7_IRB1.loc_key, G7_IRB2.loc_key) -G7_IRA.add_uniq_edge(G7_IRB2.loc_key, G7_IRB1.loc_key) -G7_IRA.add_uniq_edge(G7_IRB2.loc_key, G7_IRB3.loc_key) -G7_IRA.add_uniq_edge(G7_IRB0.loc_key, G7_IRB2.loc_key) +G7_cfg.add_uniq_edge(G7_IRB0.loc_key, G7_IRB1.loc_key) +G7_cfg.add_uniq_edge(G7_IRB1.loc_key, G7_IRB2.loc_key) +G7_cfg.add_uniq_edge(G7_IRB2.loc_key, G7_IRB1.loc_key) +G7_cfg.add_uniq_edge(G7_IRB2.loc_key, G7_IRB3.loc_key) +G7_cfg.add_uniq_edge(G7_IRB0.loc_key, G7_IRB2.loc_key) # Expected output for graph 7 -G7_EXP_IRA = IRA.new_ircfg() +G7_EXP_cfg = Lifter.new_ircfg() G7_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(r, CST1)]]) G7_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -279,11 +279,11 @@ G7_EXP_IRB2 = gen_irblock(LBL2, [[]]) G7_EXP_IRB3 = gen_irblock(LBL3, [[]]) for irb in [G7_EXP_IRB0, G7_EXP_IRB1, G7_EXP_IRB2, G7_EXP_IRB3]: - G7_EXP_IRA.add_irblock(irb) + G7_EXP_cfg.add_irblock(irb) # graph 8 : Nested loops with dead variables -G8_IRA = IRA.new_ircfg() +G8_cfg = Lifter.new_ircfg() G8_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST1)]]) G8_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) @@ -292,18 +292,18 @@ G8_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, b)]]) for irb in [G8_IRB0, G8_IRB1, G8_IRB2, G8_IRB3]: - G8_IRA.add_irblock(irb) + G8_cfg.add_irblock(irb) -G8_IRA.add_uniq_edge(G8_IRB0.loc_key, G8_IRB1.loc_key) -G8_IRA.add_uniq_edge(G8_IRB1.loc_key, G8_IRB2.loc_key) -G8_IRA.add_uniq_edge(G8_IRB2.loc_key, G8_IRB1.loc_key) -G8_IRA.add_uniq_edge(G8_IRB2.loc_key, G8_IRB3.loc_key) -G8_IRA.add_uniq_edge(G8_IRB3.loc_key, G8_IRB2.loc_key) +G8_cfg.add_uniq_edge(G8_IRB0.loc_key, G8_IRB1.loc_key) +G8_cfg.add_uniq_edge(G8_IRB1.loc_key, G8_IRB2.loc_key) +G8_cfg.add_uniq_edge(G8_IRB2.loc_key, G8_IRB1.loc_key) +G8_cfg.add_uniq_edge(G8_IRB2.loc_key, G8_IRB3.loc_key) +G8_cfg.add_uniq_edge(G8_IRB3.loc_key, G8_IRB2.loc_key) # Expected output for graph 8 -G8_EXP_IRA = IRA.new_ircfg() +G8_EXP_cfg = Lifter.new_ircfg() G8_EXP_IRB0 = gen_irblock(LBL0, [[], []]) G8_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -311,11 +311,11 @@ G8_EXP_IRB2 = gen_irblock(LBL2, [[]]) G8_EXP_IRB3 = gen_irblock(LBL3, [[]]) for irb in [G8_EXP_IRB0, G8_EXP_IRB1, G8_EXP_IRB2, G8_EXP_IRB3]: - G8_EXP_IRA.add_irblock(irb) + G8_EXP_cfg.add_irblock(irb) # graph 9 : Miultiple-exits loops with dead variables -G9_IRA = IRA.new_ircfg() +G9_cfg = Lifter.new_ircfg() G9_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST1)]]) G9_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)], [ExprAssign(b, b+CST1)]]) @@ -324,21 +324,21 @@ G9_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, b)]]) G9_IRB4 = gen_irblock(LBL4, [[ExprAssign(r, a)], [ExprAssign(r, b)]]) for irb in [G9_IRB0, G9_IRB1, G9_IRB2, G9_IRB3, G9_IRB4]: - G9_IRA.add_irblock(irb) + G9_cfg.add_irblock(irb) -G9_IRA.add_uniq_edge(G9_IRB0.loc_key, G9_IRB4.loc_key) -G9_IRA.add_uniq_edge(G9_IRB0.loc_key, G9_IRB1.loc_key) -G9_IRA.add_uniq_edge(G9_IRB1.loc_key, G9_IRB0.loc_key) -G9_IRA.add_uniq_edge(G9_IRB1.loc_key, G9_IRB4.loc_key) -G9_IRA.add_uniq_edge(G9_IRB1.loc_key, G9_IRB2.loc_key) -G9_IRA.add_uniq_edge(G9_IRB2.loc_key, G9_IRB0.loc_key) -G9_IRA.add_uniq_edge(G9_IRB2.loc_key, G9_IRB3.loc_key) -G9_IRA.add_uniq_edge(G9_IRB3.loc_key, G9_IRB4.loc_key) +G9_cfg.add_uniq_edge(G9_IRB0.loc_key, G9_IRB4.loc_key) +G9_cfg.add_uniq_edge(G9_IRB0.loc_key, G9_IRB1.loc_key) +G9_cfg.add_uniq_edge(G9_IRB1.loc_key, G9_IRB0.loc_key) +G9_cfg.add_uniq_edge(G9_IRB1.loc_key, G9_IRB4.loc_key) +G9_cfg.add_uniq_edge(G9_IRB1.loc_key, G9_IRB2.loc_key) +G9_cfg.add_uniq_edge(G9_IRB2.loc_key, G9_IRB0.loc_key) +G9_cfg.add_uniq_edge(G9_IRB2.loc_key, G9_IRB3.loc_key) +G9_cfg.add_uniq_edge(G9_IRB3.loc_key, G9_IRB4.loc_key) # Expected output for graph 9 -G9_EXP_IRA = IRA.new_ircfg() +G9_EXP_cfg = Lifter.new_ircfg() G9_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(b, CST1)]]) G9_EXP_IRB1 = gen_irblock(LBL1, [[], [ExprAssign(b, b+CST1)]]) @@ -347,12 +347,12 @@ G9_EXP_IRB3 = gen_irblock(LBL3, [[]]) G9_EXP_IRB4 = gen_irblock(LBL4, [[], [ExprAssign(r, b)]]) for irb in [G9_EXP_IRB0, G9_EXP_IRB1, G9_EXP_IRB2, G9_EXP_IRB3, G9_EXP_IRB4]: - G9_EXP_IRA.add_irblock(irb) + G9_EXP_cfg.add_irblock(irb) # graph 10 : Natural loop with alive variables symmetric assignment # (a = b <-> b = a ) -G10_IRA = IRA.new_ircfg() +G10_cfg = Lifter.new_ircfg() G10_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G10_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -360,16 +360,16 @@ G10_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, b)]]) G10_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST1)]]) for irb in [G10_IRB0, G10_IRB1, G10_IRB2, G10_IRB3]: - G10_IRA.add_irblock(irb) + G10_cfg.add_irblock(irb) -G10_IRA.add_uniq_edge(G10_IRB0.loc_key, G10_IRB1.loc_key) -G10_IRA.add_uniq_edge(G10_IRB1.loc_key, G10_IRB2.loc_key) -G10_IRA.add_uniq_edge(G10_IRB2.loc_key, G10_IRB1.loc_key) -G10_IRA.add_uniq_edge(G10_IRB2.loc_key, G10_IRB3.loc_key) +G10_cfg.add_uniq_edge(G10_IRB0.loc_key, G10_IRB1.loc_key) +G10_cfg.add_uniq_edge(G10_IRB1.loc_key, G10_IRB2.loc_key) +G10_cfg.add_uniq_edge(G10_IRB2.loc_key, G10_IRB1.loc_key) +G10_cfg.add_uniq_edge(G10_IRB2.loc_key, G10_IRB3.loc_key) # Expected output for graph 10 -G10_EXP_IRA = IRA.new_ircfg() +G10_EXP_cfg = Lifter.new_ircfg() G10_EXP_IRB0 = gen_irblock(LBL0, [[]]) G10_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -377,11 +377,11 @@ G10_EXP_IRB2 = gen_irblock(LBL2, [[]]) G10_EXP_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST1)]]) for irb in [G10_EXP_IRB0, G10_EXP_IRB1, G10_EXP_IRB2, G10_EXP_IRB3]: - G10_EXP_IRA.add_irblock(irb) + G10_EXP_cfg.add_irblock(irb) # graph 11 : If/Else conditions with alive variables -G11_IRA = IRA.new_ircfg() +G11_cfg = Lifter.new_ircfg() G11_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, b)]]) G11_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -391,17 +391,17 @@ G11_IRB4 = gen_irblock(LBL4, [[ExprAssign(b, b+CST1)]]) for irb in [G11_IRB0, G11_IRB1, G11_IRB2]: - G11_IRA.add_irblock(irb) + G11_cfg.add_irblock(irb) -G11_IRA.add_uniq_edge(G11_IRB0.loc_key, G11_IRB1.loc_key) -#G11_IRA.add_uniq_edge(G11_IRB3.loc_key, G11_IRB1.loc_key) -G11_IRA.add_uniq_edge(G11_IRB1.loc_key, G11_IRB0.loc_key) -#G11_IRA.add_uniq_edge(G11_IRB4.loc_key, G11_IRB0.loc_key) -G11_IRA.add_uniq_edge(G11_IRB1.loc_key, G11_IRB2.loc_key) +G11_cfg.add_uniq_edge(G11_IRB0.loc_key, G11_IRB1.loc_key) +#G11_cfg.add_uniq_edge(G11_IRB3.loc_key, G11_IRB1.loc_key) +G11_cfg.add_uniq_edge(G11_IRB1.loc_key, G11_IRB0.loc_key) +#G11_cfg.add_uniq_edge(G11_IRB4.loc_key, G11_IRB0.loc_key) +G11_cfg.add_uniq_edge(G11_IRB1.loc_key, G11_IRB2.loc_key) # Expected output for graph 11 -G11_EXP_IRA = IRA.new_ircfg() +G11_EXP_cfg = Lifter.new_ircfg() G11_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, b)]]) G11_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -411,12 +411,12 @@ G11_EXP_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G11_EXP_IRB0, G11_EXP_IRB1, G11_EXP_IRB2]: - G11_EXP_IRA.add_irblock(irb) + G11_EXP_cfg.add_irblock(irb) # graph 12 : Graph with multiple out points and useless definitions # of return register -G12_IRA = IRA.new_ircfg() +G12_cfg = Lifter.new_ircfg() G12_IRB0 = gen_irblock(LBL0, [[ExprAssign(r, CST1)], [ExprAssign(a, CST2)]]) G12_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -426,16 +426,16 @@ G12_IRB4 = gen_irblock(LBL4, [[ExprAssign(r, CST2)]]) G12_IRB5 = gen_irblock(LBL5, [[ExprAssign(r, b)]]) for irb in [G12_IRB0, G12_IRB1, G12_IRB2, G12_IRB3, G12_IRB4, G12_IRB5]: - G12_IRA.add_irblock(irb) + G12_cfg.add_irblock(irb) -G12_IRA.add_uniq_edge(G12_IRB0.loc_key, G12_IRB1.loc_key) -G12_IRA.add_uniq_edge(G12_IRB0.loc_key, G12_IRB2.loc_key) -G12_IRA.add_uniq_edge(G12_IRB2.loc_key, G12_IRB3.loc_key) -G12_IRA.add_uniq_edge(G12_IRB2.loc_key, G12_IRB4.loc_key) -G12_IRA.add_uniq_edge(G12_IRB4.loc_key, G12_IRB5.loc_key) +G12_cfg.add_uniq_edge(G12_IRB0.loc_key, G12_IRB1.loc_key) +G12_cfg.add_uniq_edge(G12_IRB0.loc_key, G12_IRB2.loc_key) +G12_cfg.add_uniq_edge(G12_IRB2.loc_key, G12_IRB3.loc_key) +G12_cfg.add_uniq_edge(G12_IRB2.loc_key, G12_IRB4.loc_key) +G12_cfg.add_uniq_edge(G12_IRB4.loc_key, G12_IRB5.loc_key) # Expected output for graph 12 -G12_EXP_IRA = IRA.new_ircfg() +G12_EXP_cfg = Lifter.new_ircfg() G12_EXP_IRB0 = gen_irblock(LBL0, [[], []]) G12_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -448,11 +448,11 @@ G12_EXP_IRB5 = gen_irblock(LBL5, [[ExprAssign(r, b)]]) for irb in [G12_EXP_IRB0, G12_EXP_IRB1, G12_EXP_IRB2, G12_EXP_IRB3, G12_EXP_IRB4, G12_EXP_IRB5]: - G12_EXP_IRA.add_irblock(irb) + G12_EXP_cfg.add_irblock(irb) # graph 13 : Graph where a leaf has lost its son -G13_IRA = IRA.new_ircfg() +G13_cfg = Lifter.new_ircfg() G13_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST2)]]) G13_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, b)]]) @@ -462,15 +462,15 @@ G13_IRB3 = gen_irblock(LBL3, [[]]) # lost son G13_IRB4 = gen_irblock(LBL4, [[ExprAssign(b, CST2)]]) for irb in [G13_IRB0, G13_IRB1, G13_IRB2, G13_IRB4]: - G13_IRA.add_irblock(irb) + G13_cfg.add_irblock(irb) -G13_IRA.add_uniq_edge(G13_IRB0.loc_key, G13_IRB1.loc_key) -G13_IRA.add_uniq_edge(G13_IRB0.loc_key, G13_IRB4.loc_key) -G13_IRA.add_uniq_edge(G13_IRB2.loc_key, G13_IRB3.loc_key) -G13_IRA.add_uniq_edge(G13_IRB4.loc_key, G13_IRB2.loc_key) +G13_cfg.add_uniq_edge(G13_IRB0.loc_key, G13_IRB1.loc_key) +G13_cfg.add_uniq_edge(G13_IRB0.loc_key, G13_IRB4.loc_key) +G13_cfg.add_uniq_edge(G13_IRB2.loc_key, G13_IRB3.loc_key) +G13_cfg.add_uniq_edge(G13_IRB4.loc_key, G13_IRB2.loc_key) # Expected output for graph 13 -G13_EXP_IRA = IRA.new_ircfg() +G13_EXP_cfg = Lifter.new_ircfg() G13_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST2)]]) G13_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, b)]]) @@ -480,38 +480,38 @@ G13_EXP_IRB3 = gen_irblock(LBL3, [[]]) G13_EXP_IRB4 = gen_irblock(LBL4, [[ExprAssign(b, CST2)]]) for irb in [G13_EXP_IRB0, G13_EXP_IRB1, G13_EXP_IRB2, G13_EXP_IRB4]: - G13_EXP_IRA.add_irblock(irb) + G13_EXP_cfg.add_irblock(irb) -#G13_EXP_IRA = G13_IRA +#G13_EXP_cfg = G13_cfg # graph 14 : Graph where variable assigned multiple times in a block but still # useful in the end -G14_IRA = IRA.new_ircfg() +G14_cfg = Lifter.new_ircfg() G14_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(c, a)], [ExprAssign(a, CST2)]]) G14_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+c)]]) for irb in [G14_IRB0, G14_IRB1]: - G14_IRA.add_irblock(irb) + G14_cfg.add_irblock(irb) -G14_IRA.add_uniq_edge(G14_IRB0.loc_key, G14_IRB1.loc_key) +G14_cfg.add_uniq_edge(G14_IRB0.loc_key, G14_IRB1.loc_key) # Expected output for graph 1 -G14_EXP_IRA = IRA.new_ircfg() +G14_EXP_cfg = Lifter.new_ircfg() G14_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(c, a)], [ExprAssign(a, CST2)]]) G14_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+c)]]) for irb in [G14_EXP_IRB0, G14_EXP_IRB1]: - G14_EXP_IRA.add_irblock(irb) + G14_EXP_cfg.add_irblock(irb) # graph 15 : Graph where variable assigned multiple and read at the same time, # but useless -G15_IRA = IRA.new_ircfg() +G15_cfg = Lifter.new_ircfg() G15_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST2)], [ExprAssign(a, CST1), ExprAssign(b, a+CST2), @@ -519,22 +519,22 @@ G15_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST2)], [ExprAssign(a, CST1), G15_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a)]]) for irb in [G15_IRB0, G15_IRB1]: - G15_IRA.add_irblock(irb) + G15_cfg.add_irblock(irb) -G15_IRA.add_uniq_edge(G15_IRB0.loc_key, G15_IRB1.loc_key) +G15_cfg.add_uniq_edge(G15_IRB0.loc_key, G15_IRB1.loc_key) # Expected output for graph 1 -G15_EXP_IRA = IRA.new_ircfg() +G15_EXP_cfg = Lifter.new_ircfg() G15_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(a, CST1)]]) G15_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a)]]) for irb in [G15_EXP_IRB0, G15_EXP_IRB1]: - G15_EXP_IRA.add_irblock(irb) + G15_EXP_cfg.add_irblock(irb) # graph 16 : Graph where variable assigned multiple times in the same block -G16_IRA = IRA.new_ircfg() +G16_cfg = Lifter.new_ircfg() G16_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1), ExprAssign(b, CST2), ExprAssign(c, CST3)], [ExprAssign(a, c+CST1), @@ -543,27 +543,27 @@ G16_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+b)], [ExprAssign(r, c+r)]]) G16_IRB2 = gen_irblock(LBL2, [[]]) for irb in [G16_IRB0, G16_IRB1]: - G16_IRA.add_irblock(irb) + G16_cfg.add_irblock(irb) -G16_IRA.add_uniq_edge(G16_IRB0.loc_key, G16_IRB1.loc_key) -G16_IRA.add_uniq_edge(G16_IRB1.loc_key, G16_IRB2.loc_key) +G16_cfg.add_uniq_edge(G16_IRB0.loc_key, G16_IRB1.loc_key) +G16_cfg.add_uniq_edge(G16_IRB1.loc_key, G16_IRB2.loc_key) for irb in [G16_IRB0, G16_IRB1]: - G16_IRA.add_irblock(irb) + G16_cfg.add_irblock(irb) # Expected output for graph 1 -G16_EXP_IRA = IRA.new_ircfg() +G16_EXP_cfg = Lifter.new_ircfg() G16_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(c, CST3)], [ExprAssign(a, c + CST1), ExprAssign(b, c + CST2)]]) G16_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+b)], [ExprAssign(r, c+r)]]) for irb in [G16_EXP_IRB0, G16_EXP_IRB1]: - G16_EXP_IRA.add_irblock(irb) + G16_EXP_cfg.add_irblock(irb) # graph 17 : parallel ir -G17_IRA = IRA.new_ircfg() +G17_cfg = Lifter.new_ircfg() G17_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, a*b), ExprAssign(b, c), @@ -620,12 +620,12 @@ G17_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, a*b), ]) for irb in [G17_IRB0]: - G17_IRA.add_irblock(irb) + G17_cfg.add_irblock(irb) -#G17_IRA.graph.add_node(G17_IRB0.loc_key) +#G17_cfg.graph.add_node(G17_IRB0.loc_key) # Expected output for graph 17 -G17_EXP_IRA = IRA.new_ircfg() +G17_EXP_cfg = Lifter.new_ircfg() G17_EXP_IRB0 = gen_irblock(LBL0, [[], @@ -663,48 +663,48 @@ G17_EXP_IRB0 = gen_irblock(LBL0, [[], ]) for irb in [G17_EXP_IRB0]: - G17_EXP_IRA.add_irblock(irb) + G17_EXP_cfg.add_irblock(irb) # Beginning of tests -for test_nb, test in enumerate([(G1_IRA, G1_EXP_IRA), - (G2_IRA, G2_EXP_IRA), - (G3_IRA, G3_EXP_IRA), - (G4_IRA, G4_EXP_IRA), - (G5_IRA, G5_EXP_IRA), - (G6_IRA, G6_EXP_IRA), - (G7_IRA, G7_EXP_IRA), - (G8_IRA, G8_EXP_IRA), - (G9_IRA, G9_EXP_IRA), - (G10_IRA, G10_EXP_IRA), - (G11_IRA, G11_EXP_IRA), - (G12_IRA, G12_EXP_IRA), - (G13_IRA, G13_EXP_IRA), - (G14_IRA, G14_EXP_IRA), - (G15_IRA, G15_EXP_IRA), - (G16_IRA, G16_EXP_IRA), - (G17_IRA, G17_EXP_IRA) +for test_nb, test in enumerate([(G1_cfg, G1_EXP_cfg), + (G2_cfg, G2_EXP_cfg), + (G3_cfg, G3_EXP_cfg), + (G4_cfg, G4_EXP_cfg), + (G5_cfg, G5_EXP_cfg), + (G6_cfg, G6_EXP_cfg), + (G7_cfg, G7_EXP_cfg), + (G8_cfg, G8_EXP_cfg), + (G9_cfg, G9_EXP_cfg), + (G10_cfg, G10_EXP_cfg), + (G11_cfg, G11_EXP_cfg), + (G12_cfg, G12_EXP_cfg), + (G13_cfg, G13_EXP_cfg), + (G14_cfg, G14_EXP_cfg), + (G15_cfg, G15_EXP_cfg), + (G16_cfg, G16_EXP_cfg), + (G17_cfg, G17_EXP_cfg) ]): # Extract test elements - g_ira, g_exp_ira = test + g_ircfg, g_exp_ircfg = test print("[+] Test", test_nb+1) # Print initial graph, for debug - open("graph_%02d.dot" % (test_nb+1), "w").write(g_ira.dot()) + open("graph_%02d.dot" % (test_nb+1), "w").write(g_ircfg.dot()) - reaching_defs = ReachingDefinitions(g_ira) + reaching_defs = ReachingDefinitions(g_ircfg) defuse = DiGraphDefUse(reaching_defs, deref_mem=True) # # Simplify graph - deadrm(g_ira) + deadrm(g_ircfg) # # Print simplified graph, for debug - open("simp_graph_%02d.dot" % (test_nb+1), "w").write(g_ira.dot()) + open("simp_graph_%02d.dot" % (test_nb+1), "w").write(g_ircfg.dot()) # Same number of blocks - assert len(g_ira.blocks) == len(g_exp_ira.blocks) + assert len(g_ircfg.blocks) == len(g_exp_ircfg.blocks) # Check that each expr in the blocks are the same - for lbl, irb in viewitems(g_ira.blocks): - exp_irb = g_exp_ira.blocks[lbl] + for lbl, irb in viewitems(g_ircfg.blocks): + exp_irb = g_exp_ircfg.blocks[lbl] assert exp_irb.assignblks == irb.assignblks diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py index 49a395a1..f0b67737 100644 --- a/test/analysis/depgraph.py +++ b/test/analysis/depgraph.py @@ -6,7 +6,7 @@ from future.utils import viewitems from miasm.expression.expression import ExprId, ExprInt, ExprAssign, \ ExprCond, ExprLoc, LocKey from miasm.core.locationdb import LocationDB -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock, AssignBlock from miasm.core.graph import DiGraph from miasm.analysis.depgraph import DependencyNode, DependencyGraph @@ -91,7 +91,7 @@ class Arch(object): return SP -class IRATest(ira): +class IRATest(LifterModelCall): """Fake IRA class for tests""" diff --git a/test/analysis/dse.py b/test/analysis/dse.py index 570860e4..7a2843e0 100644 --- a/test/analysis/dse.py +++ b/test/analysis/dse.py @@ -90,7 +90,7 @@ class DSETest(object): self.assembly = bytes(output) def check(self): - regs = self.dse.ir_arch.arch.regs + regs = self.dse.lifter.arch.regs value = self.dse.eval_expr(regs.EDX) # The expected value should contains '<<', showing it has been in the # corresponding generated label @@ -116,8 +116,8 @@ class DSEAttachInBreakpoint(DSETest): def __init__(self, *args, **kwargs): super(DSEAttachInBreakpoint, self).__init__(*args, **kwargs) self._dse = None - ircls = self.machine.ir - self._regs = ircls(self.loc_db).arch.regs + lifter_cls = self.machine.lifter + self._regs = lifter_cls(self.loc_db).arch.regs self._testid = ExprId("TEST", self._regs.EBX.size) def bp_attach(self, jitter): diff --git a/test/analysis/unssa.py b/test/analysis/unssa.py index 5844bfb4..bc7db487 100644 --- a/test/analysis/unssa.py +++ b/test/analysis/unssa.py @@ -5,7 +5,7 @@ from miasm.expression.expression import ExprId, ExprInt, ExprAssign, ExprMem, \ ExprCond, ExprLoc from miasm.core.locationdb import LocationDB from miasm.analysis.simplifier import IRCFGSimplifierSSA -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRCFG, IRBlock, AssignBlock loc_db = LocationDB() @@ -73,7 +73,7 @@ class Arch(object): def getsp(self, _): return sp -class IRATest(ira): +class IRATest(LifterModelCall): """Fake IRA class for tests""" @@ -601,8 +601,8 @@ class CustomIRCFGSimplifierSSA(IRCFGSimplifierSSA): """ regs = set( [ - self.ir_arch.pc, - self.ir_arch.IRDst, + self.lifter.pc, + self.lifter.IRDst, ] ) return regs diff --git a/test/arch/mep/ir/test_ir.py b/test/arch/mep/ir/test_ir.py index 97a3ec1e..c811988b 100644 --- a/test/arch/mep/ir/test_ir.py +++ b/test/arch/mep/ir/test_ir.py @@ -6,7 +6,7 @@ from __future__ import print_function from miasm.core.utils import decode_hex from miasm.arch.mep.arch import mn_mep from miasm.arch.mep.regs import regs_init -from miasm.arch.mep.ira import ir_mepb, ir_a_mepb +from miasm.arch.mep.lifter_model_call import ir_mepb, ir_a_mepb from miasm.expression.expression import ExprId, ExprInt, ExprMem from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB diff --git a/test/arch/mep/ir/ut_helpers_ir.py b/test/arch/mep/ir/ut_helpers_ir.py index c5bf36b9..ddbfdffb 100644 --- a/test/arch/mep/ir/ut_helpers_ir.py +++ b/test/arch/mep/ir/ut_helpers_ir.py @@ -11,7 +11,7 @@ from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB from miasm.core.utils import Disasm_Exception from miasm.ir.ir import AssignBlock -from miasm.arch.mep.ira import ir_a_mepb +from miasm.arch.mep.lifter_model_call import ir_a_mepb from miasm.expression.expression import ExprId, ExprInt, ExprOp, ExprMem, \ ExprAssign, ExprLoc diff --git a/test/ir/reduce_graph.py b/test/ir/reduce_graph.py index 4aa2d5ef..5142cf5a 100644 --- a/test/ir/reduce_graph.py +++ b/test/ir/reduce_graph.py @@ -9,7 +9,7 @@ from miasm.expression.expression import ExprId, ExprInt, ExprAssign, ExprCond, \ ExprLoc, LocKey from miasm.core.locationdb import LocationDB -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock, AssignBlock, IRCFG from miasm.analysis.data_flow import merge_blocks @@ -70,7 +70,7 @@ class Arch(object): return SP -class IRATest(ira): +class IRATest(LifterModelCall): """Fake IRA class for tests""" diff --git a/test/ir/symbexec.py b/test/ir/symbexec.py index d627f4b9..5b4d19b2 100755 --- a/test/ir/symbexec.py +++ b/test/ir/symbexec.py @@ -20,8 +20,8 @@ class TestSymbExec(unittest.TestCase): loc_db = LocationDB() - ira = ir_x86_32(loc_db) - ircfg = ira.new_ircfg() + lifter_model_call = ir_x86_32(loc_db) + ircfg = lifter_model_call.new_ircfg() id_x = ExprId('x', 32) id_a = ExprId('a', 32) @@ -36,7 +36,7 @@ class TestSymbExec(unittest.TestCase): return id_x return super(CustomSymbExec, self).mem_read(expr) - sb = CustomSymbExec(ira, + sb = CustomSymbExec(lifter_model_call, { ExprMem(ExprInt(0x4, 32), 8): ExprInt(0x44, 8), ExprMem(ExprInt(0x5, 32), 8): ExprInt(0x33, 8), @@ -229,7 +229,7 @@ class TestSymbExec(unittest.TestCase): assert found - sb_empty = SymbolicExecutionEngine(ira) + sb_empty = SymbolicExecutionEngine(lifter_model_call) sb_empty.dump() diff --git a/test/test_all.py b/test/test_all.py index c2391572..a8e55b2f 100755 --- a/test/test_all.py +++ b/test/test_all.py @@ -602,8 +602,8 @@ for script, prods, depends in [ ], ["bin_cfg.dot"], [test_x86_32_dis]), (["dis_binary_ir.py", Example.get_sample("test_x86_32_dis.bin"), ], ["bin_ir_cfg.dot"], [test_x86_32_dis]), - (["dis_binary_ira.py", Example.get_sample("test_x86_32_dis.bin"), - ], ["bin_ira_cfg.dot"], [test_x86_32_dis]), + (["dis_binary_lifter_model_call.py", Example.get_sample("test_x86_32_dis.bin"), + ], ["bin_lifter_model_call_cfg.dot"], [test_x86_32_dis]), (["full.py", Example.get_sample("box_upx.exe")], ["graph_execflow.dot", "lines.dot"], []), ]: |