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authorPierre LALET <pierre.lalet@cea.fr>2018-12-23 19:26:44 +0100
committerPierre LALET <pierre.lalet@cea.fr>2018-12-23 19:26:44 +0100
commit814ccf50314852d12168ad5b8a4a875a86bc6e3d (patch)
treee19e9820bb8355730ae9bd0c706e414e39c895ef /example/disasm
parent011e1e209b3d00afe3c8e65000209a568c5eb791 (diff)
downloadmiasm-814ccf50314852d12168ad5b8a4a875a86bc6e3d.tar.gz
miasm-814ccf50314852d12168ad5b8a4a875a86bc6e3d.zip
Fix typos & add codespell
Diffstat (limited to 'example/disasm')
-rw-r--r--example/disasm/dis_binary_ir.py2
-rw-r--r--example/disasm/dis_binary_ira.py2
-rw-r--r--example/disasm/full.py2
3 files changed, 3 insertions, 3 deletions
diff --git a/example/disasm/dis_binary_ir.py b/example/disasm/dis_binary_ir.py
index 6d98d692..197fccfd 100644
--- a/example/disasm/dis_binary_ir.py
+++ b/example/disasm/dis_binary_ir.py
@@ -21,7 +21,7 @@ asmcfg = mdis.dis_multiblock(addr)
 #    End common section             #
 #####################################
 
-# Get an IR convertor
+# Get an IR converter
 ir_arch = machine.ir(mdis.loc_db)
 
 # Get the IR of the asmcfg
diff --git a/example/disasm/dis_binary_ira.py b/example/disasm/dis_binary_ira.py
index c1bd5dc0..726f353e 100644
--- a/example/disasm/dis_binary_ira.py
+++ b/example/disasm/dis_binary_ira.py
@@ -21,7 +21,7 @@ asmcfg = mdis.dis_multiblock(addr)
 #    End common section             #
 #####################################
 
-# Get an IRA convertor
+# Get an IRA converter
 # The sub call are modelised by default operators
 # call_func_ret and call_func_stack
 ir_arch_analysis = machine.ira(mdis.loc_db)
diff --git a/example/disasm/full.py b/example/disasm/full.py
index 03094a55..7f4d4945 100644
--- a/example/disasm/full.py
+++ b/example/disasm/full.py
@@ -282,7 +282,7 @@ if args.propagexpr:
             return set(out.values())
 
 
-    # Add dummy dependecy to uncover out regs affectation
+    # Add dummy dependency to uncover out regs affectation
     for loc in ircfg_a.leaves():
         irblock = ircfg_a.blocks.get(loc)
         if irblock is None: