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| author | IridiumXOR <oliveriandrea@gmail.com> | 2020-05-16 00:22:58 +0200 |
|---|---|---|
| committer | IridiumXOR <oliveriandrea@gmail.com> | 2020-05-16 00:22:58 +0200 |
| commit | a9bca262576cec0ac50c70bad71bf236339ef4a0 (patch) | |
| tree | 01d3f194ef688ebd3be856018f96fb214ef82c41 /miasm/arch/mips32/sem.py | |
| parent | 894f4453fabf967002cd2395f56f34d76b2c97ed (diff) | |
| download | miasm-a9bca262576cec0ac50c70bad71bf236339ef4a0.tar.gz miasm-a9bca262576cec0ac50c70bad71bf236339ef4a0.zip | |
New opcodes and little bugfix
Diffstat (limited to '')
| -rw-r--r-- | miasm/arch/mips32/sem.py | 110 |
1 files changed, 107 insertions, 3 deletions
diff --git a/miasm/arch/mips32/sem.py b/miasm/arch/mips32/sem.py index 903be3be..669fca13 100644 --- a/miasm/arch/mips32/sem.py +++ b/miasm/arch/mips32/sem.py @@ -84,6 +84,11 @@ def lb(arg1, arg2): arg1 = mem8[arg2.ptr].signExtend(32) @sbuild.parse +def ll(arg1, arg2): + "To load a word from memory for an atomic read-modify-write" + arg1 = arg2 + +@sbuild.parse def beq(arg1, arg2, arg3): "Branches on @arg3 if the quantities of two registers @arg1, @arg2 are eq" dst = arg3 if ExprOp(m2_expr.TOK_EQUAL, arg1, arg2) else ExprLoc(ir.get_next_break_loc_key(instr), ir.IRDst.size) @@ -140,6 +145,14 @@ def nop(): """Do nothing""" @sbuild.parse +def sync(arg1): + """Syncronize Shared Memory""" + +@sbuild.parse +def pref(arg1, arg2): + """To move data between memory and cache""" + +@sbuild.parse def j(arg1): """Jump to an address @arg1""" PC = arg1 @@ -372,6 +385,14 @@ def tlbwi(): def tlbp(): "TODO XXX" +@sbuild.parse +def tlbwr(): + "TODO XXX" + +@sbuild.parse +def tlbr(): + "TODO XXX" + def ins(ir, instr, a, b, c, d): e = [] pos = int(c) @@ -488,6 +509,66 @@ def ei(arg1): def ehb(arg1): "NOP" +@sbuild.parse +def sc(arg1, arg2): + arg1 = arg2; + arg2 = ExprInt(0x1, 32) + +@sbuild.parse +def mthi(arg1): + R_HI = arg1 + +@sbuild.parse +def mtlo(arg1): + R_LOW = arg1 + +@sbuild.parse +def clz(rs, rd): + + # Rd <- LeadingZeroDetect(Rs) + + # Invert the value + reversed_rs = ~rs + + # Test bits individually + b31 = (reversed_rs & i32(2**31)) >> i32(31) if reversed_rs else i32(0) + b30 = (reversed_rs & i32(2**30)) >> i32(30) if b31 else i32(0) + b29 = (reversed_rs & i32(2**29)) >> i32(29) if b30 else i32(0) + b28 = (reversed_rs & i32(2**28)) >> i32(28) if b29 else i32(0) + b27 = (reversed_rs & i32(2**27)) >> i32(27) if b28 else i32(0) + b26 = (reversed_rs & i32(2**26)) >> i32(26) if b27 else i32(0) + b25 = (reversed_rs & i32(2**25)) >> i32(25) if b26 else i32(0) + b24 = (reversed_rs & i32(2**24)) >> i32(24) if b25 else i32(0) + b23 = (reversed_rs & i32(2**23)) >> i32(23) if b24 else i32(0) + b22 = (reversed_rs & i32(2**22)) >> i32(22) if b23 else i32(0) + b21 = (reversed_rs & i32(2**21)) >> i32(21) if b22 else i32(0) + b20 = (reversed_rs & i32(2**20)) >> i32(20) if b21 else i32(0) + b19 = (reversed_rs & i32(2**19)) >> i32(19) if b20 else i32(0) + b18 = (reversed_rs & i32(2**18)) >> i32(18) if b19 else i32(0) + b17 = (reversed_rs & i32(2**17)) >> i32(17) if b18 else i32(0) + b16 = (reversed_rs & i32(2**16)) >> i32(16) if b17 else i32(0) + b15 = (reversed_rs & i32(2**15)) >> i32(15) if b16 else i32(0) + b14 = (reversed_rs & i32(2**14)) >> i32(14) if b15 else i32(0) + b13 = (reversed_rs & i32(2**13)) >> i32(13) if b14 else i32(0) + b12 = (reversed_rs & i32(2**12)) >> i32(12) if b13 else i32(0) + b11 = (reversed_rs & i32(2**11)) >> i32(11) if b12 else i32(0) + b10 = (reversed_rs & i32(2**10)) >> i32(10) if b11 else i32(0) + b09 = (reversed_rs & i32(2 ** 9)) >> i32(9) if b10 else i32(0) + b08 = (reversed_rs & i32(2 ** 8)) >> i32(8) if b09 else i32(0) + b07 = (reversed_rs & i32(2 ** 7)) >> i32(7) if b08 else i32(0) + b06 = (reversed_rs & i32(2 ** 6)) >> i32(6) if b07 else i32(0) + b05 = (reversed_rs & i32(2 ** 5)) >> i32(5) if b06 else i32(0) + b04 = (reversed_rs & i32(2 ** 4)) >> i32(4) if b05 else i32(0) + b03 = (reversed_rs & i32(2 ** 3)) >> i32(3) if b04 else i32(0) + b02 = (reversed_rs & i32(2 ** 2)) >> i32(2) if b03 else i32(0) + b01 = (reversed_rs & i32(2 ** 1)) >> i32(1) if b02 else i32(0) + b00 = (reversed_rs & i32(2 ** 0)) >> i32(0) if b01 else i32(0) + + # Sum all partial results + rd = b31 + b30 + b29 + b28 + b27 + b26 + b25 + b24 + b23 + b22 + b21 + b20 \ + + b19 + b18 + b17 + b16 + b15 + b14 + b13 + b12 + b11 + b10 + b09 + b08 \ + + b07 + b06 + b05 + b04 + b03 + b02 + b01 + b00 + def teq(ir, instr, arg1, arg2): e = [] @@ -499,7 +580,7 @@ def teq(ir, instr, arg1, arg2): do_except.append(m2_expr.ExprAssign(exception_flags, m2_expr.ExprInt( EXCEPT_DIV_BY_ZERO, exception_flags.size))) do_except.append(m2_expr.ExprAssign(ir.IRDst, loc_next_expr)) - blk_except = IRBlock(loc_except.index, [AssignBlock(do_except, instr)]) + blk_except = IRBlock(loc_except, [AssignBlock(do_except, instr)]) cond = arg1 - arg2 @@ -510,6 +591,28 @@ def teq(ir, instr, arg1, arg2): return e, [blk_except] +def tne(ir, instr, arg1, arg2): + e = [] + + loc_except, loc_except_expr = ir.gen_loc_key_and_expr(ir.IRDst.size) + loc_next = ir.get_next_loc_key(instr) + loc_next_expr = m2_expr.ExprLoc(loc_next, ir.IRDst.size) + + do_except = [] + do_except.append(m2_expr.ExprAssign(exception_flags, m2_expr.ExprInt( + EXCEPT_DIV_BY_ZERO, exception_flags.size))) + do_except.append(m2_expr.ExprAssign(ir.IRDst, loc_next_expr)) + blk_except = IRBlock(loc_except, [AssignBlock(do_except, instr)]) + + cond = arg1 ^ arg2 + + + e = [] + e.append(m2_expr.ExprAssign(ir.IRDst, + m2_expr.ExprCond(cond, loc_next_expr, loc_except_expr))) + + return e, [blk_except] + mnemo_func = sbuild.functions mnemo_func.update({ @@ -536,8 +639,9 @@ mnemo_func.update({ 'subu': l_sub, 'xor': l_xor, 'xori': l_xor, - 'teq': teq -}) + 'teq': teq, + 'tne': tne + }) def get_mnemo_expr(ir, instr, *args): instr, extra_ir = mnemo_func[instr.name.lower()](ir, instr, *args) |