about summary refs log tree commit diff stats
path: root/miasm2/analysis/depgraph.py
diff options
context:
space:
mode:
authorFabrice Desclaux <fabrice.desclaux@cea.fr>2018-07-05 11:04:46 +0200
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2018-07-05 13:16:45 +0200
commit1d8dc96d6cd82d40e81e8436ed2827916179cd2e (patch)
tree8bce7b5aaf34fac81611243688c5a6040536ec81 /miasm2/analysis/depgraph.py
parent143196e691a124df3c011167e73a77c1fd503453 (diff)
downloadmiasm-1d8dc96d6cd82d40e81e8436ed2827916179cd2e.tar.gz
miasm-1d8dc96d6cd82d40e81e8436ed2827916179cd2e.zip
IR: remove default regs_init for symbexec
Diffstat (limited to '')
-rw-r--r--miasm2/analysis/depgraph.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/miasm2/analysis/depgraph.py b/miasm2/analysis/depgraph.py
index f5a2b043..11476f79 100644
--- a/miasm2/analysis/depgraph.py
+++ b/miasm2/analysis/depgraph.py
@@ -281,7 +281,7 @@ class DependencyResult(DependencyState):
         variant.
         """
         # Init
-        ctx_init = self._ira.arch.regs.regs_init
+        ctx_init = {}
         if ctx is not None:
             ctx_init.update(ctx)
         assignblks = []
@@ -352,7 +352,7 @@ class DependencyResultImplicit(DependencyResult):
 
     def emul(self, ctx=None, step=False):
         # Init
-        ctx_init = self._ira.arch.regs.regs_init
+        ctx_init = {}
         if ctx is not None:
             ctx_init.update(ctx)
         solver = z3.Solver()