diff options
| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-05-05 23:13:12 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-05-14 10:29:27 +0200 |
| commit | 94d49ed54f07e3d399de74de13f5422837c031fa (patch) | |
| tree | b3f7fd34c7ff8d17bd9f26d53511b30935485092 /miasm2/arch/aarch64/regs.py | |
| parent | db4fd7f58d6a4ed87fc7d6f28c7c2af31e61fb65 (diff) | |
| download | miasm-94d49ed54f07e3d399de74de13f5422837c031fa.tar.gz miasm-94d49ed54f07e3d399de74de13f5422837c031fa.zip | |
Core: updt parser structure
Diffstat (limited to 'miasm2/arch/aarch64/regs.py')
| -rw-r--r-- | miasm2/arch/aarch64/regs.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/miasm2/arch/aarch64/regs.py b/miasm2/arch/aarch64/regs.py index bf1c5cef..c9da0653 100644 --- a/miasm2/arch/aarch64/regs.py +++ b/miasm2/arch/aarch64/regs.py @@ -45,9 +45,9 @@ simd128_expr, simd128_init, simd128_info = gen_regs( simd128_str, globals(), 128) -gen_reg("PC", globals(), 64) -gen_reg("WZR", globals(), 32) -gen_reg("XZR", globals(), 64) +PC, _ = gen_reg("PC", 64) +WZR, _ = gen_reg("WZR", 32) +XZR, _ = gen_reg("XZR", 64) PC_init = ExprId("PC_init", 64) WZR_init = ExprId("WZR_init", 32) |