diff options
| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-01-25 17:30:20 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-01-27 12:36:00 +0100 |
| commit | 40bcffb271601512bcf9f6bf27f08068cfc2f8fe (patch) | |
| tree | f8eca3334ce295fd1dd50ff72c9a3301363410a0 /miasm2/arch/aarch64/sem.py | |
| parent | 98f54e1cff3b80d2c0c14ed0424b90bfe9112680 (diff) | |
| download | miasm-40bcffb271601512bcf9f6bf27f08068cfc2f8fe.tar.gz miasm-40bcffb271601512bcf9f6bf27f08068cfc2f8fe.zip | |
Aarch64: add lda/stl
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index e4702a4f..7052f423 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -622,6 +622,25 @@ def ldrsh(ir, instr, arg1, arg2): def ldrsw(ir, instr, arg1, arg2): return ldrs_size(ir, instr, arg1, arg2, 32) +def ldaxrb(ir, instr, arg1, arg2): + # TODO XXX no memory lock implemented + assert arg2.is_op('preinc') + assert len(arg2.args) == 1 + ptr = arg2.args[0] + e = [] + e.append(ExprAssign(arg1, ExprMem(ptr, 8).zeroExtend(arg1.size))) + return e, [] + + +def stlxrb(ir, instr, arg1, arg2, arg3): + assert arg3.is_op('preinc') + assert len(arg3.args) == 1 + ptr = arg3.args[0] + e = [] + e.append(ExprAssign(ExprMem(ptr, 8), arg2[:8])) + # TODO XXX here, force update success + e.append(ExprAssign(arg1, ExprInt(0, arg1.size))) + return e, [] def l_str(ir, instr, arg1, arg2): @@ -1319,6 +1338,9 @@ mnemo_func.update({ 'ldrsh': ldrsh, 'ldrsw': ldrsw, + 'ldaxrb': ldaxrb, + 'stlxrb': stlxrb, + 'str': l_str, 'strb': strb, 'strh': strh, |