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| author | Camille Mougey <commial@gmail.com> | 2018-06-09 09:05:05 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-06-09 09:05:05 +0200 |
| commit | 990060f21e515ff1a25246f8fdf0936a97ac698f (patch) | |
| tree | b10543391f9a66ddd5e3f6852c30d96b169b623d /miasm2/arch/aarch64/sem.py | |
| parent | dadfaabc3fff5edb9bf4ef7e7e8c4cfc4baccb94 (diff) | |
| parent | 61551fa78e9dd22ed1f982b4fe171fd6383c39a6 (diff) | |
| download | miasm-990060f21e515ff1a25246f8fdf0936a97ac698f.tar.gz miasm-990060f21e515ff1a25246f8fdf0936a97ac698f.zip | |
Merge pull request #751 from serpilliere/ExprLabel
Expr Loc
Diffstat (limited to 'miasm2/arch/aarch64/sem.py')
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index 88b0d0a7..ad582878 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -593,14 +593,14 @@ def udiv(arg1, arg2, arg3): @sbuild.parse def cbz(arg1, arg2): - dst = m2_expr.ExprId(ir.get_next_label(instr), 64) if arg1 else arg2 + dst = m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) if arg1 else arg2 PC = dst ir.IRDst = dst @sbuild.parse def cbnz(arg1, arg2): - dst = arg2 if arg1 else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg2 if arg1 else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -609,7 +609,7 @@ def cbnz(arg1, arg2): def tbz(arg1, arg2, arg3): bitmask = m2_expr.ExprInt(1, arg1.size) << arg2 dst = m2_expr.ExprId( - ir.get_next_label(instr), 64) if arg1 & bitmask else arg3 + ir.get_next_loc_key(instr), 64) if arg1 & bitmask else arg3 PC = dst ir.IRDst = dst @@ -618,21 +618,21 @@ def tbz(arg1, arg2, arg3): def tbnz(arg1, arg2, arg3): bitmask = m2_expr.ExprInt(1, arg1.size) << arg2 dst = arg3 if arg1 & bitmask else m2_expr.ExprId( - ir.get_next_label(instr), 64) + ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @sbuild.parse def b_ne(arg1): - dst = m2_expr.ExprId(ir.get_next_label(instr), 64) if zf else arg1 + dst = m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) if zf else arg1 PC = dst ir.IRDst = dst @sbuild.parse def b_eq(arg1): - dst = arg1 if zf else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if zf else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -640,7 +640,7 @@ def b_eq(arg1): @sbuild.parse def b_ge(arg1): cond = cond2expr['GE'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -648,7 +648,7 @@ def b_ge(arg1): @sbuild.parse def b_gt(arg1): cond = cond2expr['GT'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -656,7 +656,7 @@ def b_gt(arg1): @sbuild.parse def b_cc(arg1): cond = cond2expr['CC'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -664,7 +664,7 @@ def b_cc(arg1): @sbuild.parse def b_cs(arg1): cond = cond2expr['CS'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -672,7 +672,7 @@ def b_cs(arg1): @sbuild.parse def b_hi(arg1): cond = cond2expr['HI'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -680,7 +680,7 @@ def b_hi(arg1): @sbuild.parse def b_le(arg1): cond = cond2expr['LE'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -688,7 +688,7 @@ def b_le(arg1): @sbuild.parse def b_ls(arg1): cond = cond2expr['LS'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -696,7 +696,7 @@ def b_ls(arg1): @sbuild.parse def b_lt(arg1): cond = cond2expr['LT'] - dst = arg1 if cond else m2_expr.ExprId(ir.get_next_label(instr), 64) + dst = arg1 if cond else m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) PC = dst ir.IRDst = dst @@ -732,7 +732,7 @@ def br(arg1): def blr(arg1): PC = arg1 ir.IRDst = arg1 - LR = m2_expr.ExprId(ir.get_next_label(instr), 64) + LR = m2_expr.ExprLoc(ir.get_next_loc_key(instr), 64) @sbuild.parse def nop(): @@ -877,7 +877,7 @@ class ir_aarch64l(IntermediateRepresentation): src = self.expr_fix_regs_for_mode(src) new_assignblk[dst] = src irs.append(AssignBlock(new_assignblk, assignblk.instr)) - return IRBlock(irblock.label, irs) + return IRBlock(irblock.loc_key, irs) def mod_pc(self, instr, instr_ir, extra_ir): "Replace PC by the instruction's offset" @@ -908,7 +908,7 @@ class ir_aarch64l(IntermediateRepresentation): new_dsts = {dst:src for dst, src in assignblk.iteritems() if dst not in regs_to_fix} irs.append(AssignBlock(new_dsts, assignblk.instr)) - new_irblocks.append(IRBlock(irblock.label, irs)) + new_irblocks.append(IRBlock(irblock.loc_key, irs)) return instr_ir, new_irblocks |