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| author | Camille Mougey <commial@gmail.com> | 2017-05-16 17:40:49 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-05-16 17:40:49 +0200 |
| commit | d3e5587207f68763ea483c0deeef160b3ebec155 (patch) | |
| tree | 51580d83ad4a574350975494d577fcc7b1fbcf7f /miasm2/arch/aarch64/sem.py | |
| parent | 627669759b4bdcfb220f098a141c183621477cd6 (diff) | |
| parent | 09f7c519d4c3249736a16ce36be9b6c3f135d6a8 (diff) | |
| download | miasm-d3e5587207f68763ea483c0deeef160b3ebec155.tar.gz miasm-d3e5587207f68763ea483c0deeef160b3ebec155.zip | |
Merge pull request #551 from serpilliere/instr_except
IR: explicit exception for div
Diffstat (limited to 'miasm2/arch/aarch64/sem.py')
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index 599cdc98..79c72d32 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -3,8 +3,8 @@ from miasm2.ir.ir import IntermediateRepresentation, IRBlock, AssignBlock from miasm2.arch.aarch64.arch import mn_aarch64, conds_expr, replace_regs from miasm2.arch.aarch64.regs import * from miasm2.core.sembuilder import SemBuilder +from miasm2.jitter.csts import EXCEPT_DIV_BY_ZERO -EXCEPT_PRIV_INSN = (1 << 17) # CPSR: N Z C V @@ -136,7 +136,9 @@ ctx = {"PC": PC, "of": of, "cond2expr": cond2expr, "extend_arg": extend_arg, - "m2_expr":m2_expr + "m2_expr":m2_expr, + "exception_flags": exception_flags, + "EXCEPT_DIV_BY_ZERO": EXCEPT_DIV_BY_ZERO, } sbuild = SemBuilder(ctx) @@ -528,7 +530,11 @@ def msub(arg1, arg2, arg3, arg4): @sbuild.parse def udiv(arg1, arg2, arg3): - arg1 = m2_expr.ExprOp('udiv', arg2, arg3) + if arg3: + arg1 = m2_expr.ExprOp('udiv', arg2, arg3) + else: + exception_flags = m2_expr.ExprInt(EXCEPT_DIV_BY_ZERO, + exception_flags.size) @sbuild.parse |