Merge pull request #15 from serpilliere/fixes

Multiple Fix / Arm SMULL

1 files changed, 20 insertions, 0 deletions

diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py
index 47016d6b..73b198ba 100644
--- a/miasm2/arch/arm/arch.py
+++ b/miasm2/arch/arm/arch.py
@@ -1142,6 +1142,8 @@ class arm_rlist(m_arg):
         for i in xrange(0x10):
             if 1 << i & v:
                 out.append(gpregs.expr[i])
+        if not out:
+            return False
         e = ExprOp('reglist', *out)
         if self.parent.sbit.value == 1:
             e = ExprOp('sbit', e)
@@ -1286,6 +1288,16 @@ offs_blx = bs(l=24, cls=(arm_offs_blx,), fname="offs")
 
 fix_cond = bs("1111", fname="cond")
 
+class mul_part_x(bs_mod_name):
+    prio = 5
+    mn_mod = ['B', 'T']
+
+class mul_part_y(bs_mod_name):
+    prio = 6
+    mn_mod = ['B', 'T']
+
+mul_x = mul_part_x(l=1, fname='x', mn_mod=['B', 'T'])
+mul_y = mul_part_y(l=1, fname='y', mn_mod=['B', 'T'])
 
 class arm_immed(m_arg):
     parser = deref
@@ -1453,6 +1465,8 @@ armop("data_mov",
 armop("data_test", [bs('00'), immop, bs_data_test_name, dumscc, rn, dumr, op2])
 armop("b", [bs('101'), lnk, offs])
 
+armop("smul", [bs('00010110'), rd, bs('0000'), rs, bs('1'), mul_y, mul_x, bs('0'), rm], [rd, rm, rs])
+
 # TODO TEST
 #armop("und", [bs('011'), imm20, bs('1'), imm4])
 armop("transfer", [bs('01'), immop, ppi, updown, trb, wback_no_t,
@@ -1751,6 +1765,8 @@ class armt_rlist(m_arg):
         for i in xrange(0x10):
             if 1 << i & v:
                 out.append(gpregs.expr[i])
+        if not out:
+            return False
         e = ExprOp('reglist', *out)
         self.expr = e
         return True
@@ -1791,6 +1807,8 @@ class armt_rlist_pclr(armt_rlist):
                 out += [regs_expr[14]]
             else:
                 out += [regs_expr[15]]
+        if not out:
+            return False
         e = ExprOp('reglist', *out)
         self.expr = e
         return True
@@ -2006,6 +2024,8 @@ class armt_gpreg_rm_shift_off(arm_reg):
 
     def decode(self, v):
         v = v & self.lmask
+        if v >= len(gpregs_nosppc.expr):
+            return False
         r = gpregs_nosppc.expr[v]
 
         i = int(self.parent.imm5_3.value) << 2