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| author | Ajax <commial@gmail.com> | 2017-07-21 17:34:30 +0200 |
|---|---|---|
| committer | Ajax <commial@gmail.com> | 2017-07-21 17:34:30 +0200 |
| commit | 6332dcc344b28e9a8e8b17c718364e2c5c1ad235 (patch) | |
| tree | 3e4988de3774799dadc1bce9a26c461ab2bc6063 /miasm2/arch/arm/jit.py | |
| parent | 4dfca940e75ad8af65b69dd9bab9ff503141984b (diff) | |
| download | miasm-6332dcc344b28e9a8e8b17c718364e2c5c1ad235.tar.gz miasm-6332dcc344b28e9a8e8b17c718364e2c5c1ad235.zip | |
Add support for multi-ret on stdcall / systemV ARM ABI
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/arm/jit.py | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py index 545d60de..b07f2a38 100644 --- a/miasm2/arch/arm/jit.py +++ b/miasm2/arch/arm/jit.py @@ -38,10 +38,12 @@ class jitter_arml(jitter): ret_ad = self.cpu.LR return ret_ad, args - def func_ret_stdcall(self, ret_addr, ret_value=None): + def func_ret_stdcall(self, ret_addr, ret_value1=None, ret_value2=None): self.pc = self.cpu.PC = ret_addr - if ret_value is not None: - self.cpu.R0 = ret_value + if ret_value1 is not None: + self.cpu.R0 = ret_value1 + if ret_value2 is not None: + self.cpu.R1 = ret_value2 return True def func_prepare_stdcall(self, ret_addr, *args): |