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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2016-06-05 17:54:05 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2016-06-05 23:09:29 +0200 |
| commit | 0e89fe976f3d302c5a827724abb3ca6bd24c3180 (patch) | |
| tree | 86d3b01fc0ce67672faf9972da721ace54073d23 /miasm2/arch/arm/sem.py | |
| parent | d21cac6384e9b9bec08d5e9a797384b1868db0be (diff) | |
| download | miasm-0e89fe976f3d302c5a827724abb3ca6bd24c3180.tar.gz miasm-0e89fe976f3d302c5a827724abb3ca6bd24c3180.zip | |
Arch/armt: add pld instruction
Diffstat (limited to 'miasm2/arch/arm/sem.py')
| -rw-r--r-- | miasm2/arch/arm/sem.py | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index 6838ef66..5bd4db24 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -933,6 +933,9 @@ def rev(ir, instr, a, b): e.append(ExprAff(a, c)) return e +def pld(ir, instr, a): + return [] + COND_EQ = 0 @@ -1137,6 +1140,7 @@ mnemo_nocond = {'lsr': lsr, 'asrs': asrs, 'cbz': cbz, 'cbnz': cbnz, + 'pld': pld, } mn_cond_x = [mnemo_condm0, mnemo_condm1, |