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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-10-03 17:20:38 +0200 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2018-03-15 14:46:36 +0100 |
| commit | 1b534d9ad543473f12ddcb631e0cddb0cbd54ff4 (patch) | |
| tree | 5d5248ceb9358a1f497f4830e821e50afb340dba /miasm2/arch/arm/sem.py | |
| parent | edabfcda0fa8c0dd8ab3017853b375b1ee24b754 (diff) | |
| download | miasm-1b534d9ad543473f12ddcb631e0cddb0cbd54ff4.tar.gz miasm-1b534d9ad543473f12ddcb631e0cddb0cbd54ff4.zip | |
Symbexec: use hashtable for mem symbols
Diffstat (limited to 'miasm2/arch/arm/sem.py')
| -rw-r--r-- | miasm2/arch/arm/sem.py | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index c2afeef5..395eb1cb 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -1233,6 +1233,7 @@ class ir_arml(IntermediateRepresentation): self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) + self.addrsize = 32 def get_ir(self, instr): args = instr.args @@ -1263,6 +1264,7 @@ class ir_armb(ir_arml): self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) + self.addrsize = 32 class ir_armtl(IntermediateRepresentation): def __init__(self, symbol_pool=None): @@ -1270,6 +1272,7 @@ class ir_armtl(IntermediateRepresentation): self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) + self.addrsize = 32 def get_ir(self, instr): return get_mnemo_expr(self, instr, *instr.args) @@ -1280,4 +1283,5 @@ class ir_armtb(ir_armtl): self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) + self.addrsize = 32 |