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| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-02-25 11:09:54 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2019-03-05 16:52:49 +0100 |
| commit | 02bbb30efea4980c9d133947cbbf69fb599071ad (patch) | |
| tree | 3fea6826fcc5354840a27cb1dc99ff31eef81896 /miasm2/arch/mep/regs.py | |
| parent | eab809932871f91d6f4aa770fc321af9e156e0f5 (diff) | |
| download | miasm-02bbb30efea4980c9d133947cbbf69fb599071ad.tar.gz miasm-02bbb30efea4980c9d133947cbbf69fb599071ad.zip | |
Support python2/python3
Diffstat (limited to 'miasm2/arch/mep/regs.py')
| -rw-r--r-- | miasm2/arch/mep/regs.py | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/miasm2/arch/mep/regs.py b/miasm2/arch/mep/regs.py index a515e76a..88248823 100644 --- a/miasm2/arch/mep/regs.py +++ b/miasm2/arch/mep/regs.py @@ -1,6 +1,7 @@ # Toshiba MeP-c4 - miasm registers definition # Guillaume Valadon <guillaume@valadon.net> +from builtins import range from miasm2.expression.expression import ExprId from miasm2.core.cpu import reg_info, gen_reg, gen_regs @@ -19,7 +20,7 @@ in_erepeat_init = ExprId("take_jmp_init", 32) # General-purpose registers (R0 to R15) names -gpr_names = ["R%d" % r for r in xrange(13)] # register names +gpr_names = ["R%d" % r for r in range(13)] # register names gpr_names += ["TP", "GP", "SP"] # according to the manual GP does not exist gpr_exprs, gpr_inits, gpr_infos = gen_regs(gpr_names, globals()) # sz=32 bits (default) @@ -53,7 +54,7 @@ RPC = csr_exprs[6] # Repeat Counter. On MeP, it is the special register R6 # Coprocesssor general-purpose registers (C0 to C15) names # Note: a processor extension allows up to 32 coprocessor general-purpose registers -copro_gpr_names = ["C%d" % r for r in xrange(32)] # register names +copro_gpr_names = ["C%d" % r for r in range(32)] # register names copro_gpr_exprs, copro_gpr_inits, copro_gpr_infos = gen_regs(copro_gpr_names, globals()) |