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authorFabrice Desclaux <fabrice.desclaux@cea.fr>2019-02-25 11:09:54 +0100
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2019-03-05 16:52:49 +0100
commit02bbb30efea4980c9d133947cbbf69fb599071ad (patch)
tree3fea6826fcc5354840a27cb1dc99ff31eef81896 /miasm2/arch/mep
parenteab809932871f91d6f4aa770fc321af9e156e0f5 (diff)
downloadmiasm-02bbb30efea4980c9d133947cbbf69fb599071ad.tar.gz
miasm-02bbb30efea4980c9d133947cbbf69fb599071ad.zip
Support python2/python3
Diffstat (limited to 'miasm2/arch/mep')
-rw-r--r--miasm2/arch/mep/arch.py7
-rw-r--r--miasm2/arch/mep/regs.py5
-rw-r--r--miasm2/arch/mep/sem.py8
3 files changed, 11 insertions, 9 deletions
diff --git a/miasm2/arch/mep/arch.py b/miasm2/arch/mep/arch.py
index e4d66a63..2266b596 100644
--- a/miasm2/arch/mep/arch.py
+++ b/miasm2/arch/mep/arch.py
@@ -1,6 +1,7 @@
 # Toshiba MeP-c4 - miasm architecture definition
 # Guillaume Valadon <guillaume@valadon.net>
 
+from builtins import range
 from miasm2.core.cpu import *
 from miasm2.core.utils import Disasm_Exception
 from miasm2.expression.expression import Expr, ExprId, ExprInt, ExprLoc, \
@@ -279,7 +280,7 @@ class instruction_mep(instruction):
         self.args[num] = ExprInt(off, 32)
 
 
-class mep_additional_info:
+class mep_additional_info(object):
     """Additional MeP instructions information
     """
 
@@ -432,7 +433,7 @@ class mn_mep(cls_mn):
         o = 0  # the returned value
         while n:
             # Get a byte, the offset is adjusted according to the endianness
-            offset = start / 8  # the offset in bytes
+            offset = start // 8  # the offset in bytes
             n_offset = cls.endian_offset(attrib, offset)  # the adjusted offset
             c = cls.getbytes(bitstream, n_offset, 1)
             if not c:
@@ -552,7 +553,7 @@ class mep_arg(m_arg):
                 return arg.name
             if isinstance(arg.name, str) and arg.name in gpr_names:
                 return None  # GV: why?
-            loc_key = loc_db.get_or_create_name_location(arg.name)
+            loc_key = loc_db.get_or_create_name_location(arg.name.encode())
             return ExprLoc(loc_key, 32)
 
         elif isinstance(arg, AstMem):
diff --git a/miasm2/arch/mep/regs.py b/miasm2/arch/mep/regs.py
index a515e76a..88248823 100644
--- a/miasm2/arch/mep/regs.py
+++ b/miasm2/arch/mep/regs.py
@@ -1,6 +1,7 @@
 # Toshiba MeP-c4 - miasm registers definition
 # Guillaume Valadon <guillaume@valadon.net>
 
+from builtins import range
 from miasm2.expression.expression import ExprId
 from miasm2.core.cpu import reg_info, gen_reg, gen_regs
 
@@ -19,7 +20,7 @@ in_erepeat_init = ExprId("take_jmp_init", 32)
 
 
 # General-purpose registers (R0 to R15) names
-gpr_names = ["R%d" % r for r in xrange(13)]  # register names
+gpr_names = ["R%d" % r for r in range(13)]  # register names
 gpr_names += ["TP", "GP", "SP"]  # according to the manual GP does not exist
 gpr_exprs, gpr_inits, gpr_infos = gen_regs(gpr_names, globals())  # sz=32 bits (default)
 
@@ -53,7 +54,7 @@ RPC = csr_exprs[6]  # Repeat Counter. On MeP, it is the special register R6
 
 # Coprocesssor general-purpose registers (C0 to C15) names
 # Note: a processor extension allows up to 32 coprocessor general-purpose registers
-copro_gpr_names = ["C%d" % r for r in xrange(32)]  # register names
+copro_gpr_names = ["C%d" % r for r in range(32)]  # register names
 copro_gpr_exprs, copro_gpr_inits, copro_gpr_infos = gen_regs(copro_gpr_names, globals())
 
 
diff --git a/miasm2/arch/mep/sem.py b/miasm2/arch/mep/sem.py
index fb67becd..c346c535 100644
--- a/miasm2/arch/mep/sem.py
+++ b/miasm2/arch/mep/sem.py
@@ -929,15 +929,15 @@ def div(rn, rm):
     tmp_rm_inv = rm_inv if rm_inv else i32(1)
 
     # Results if only rn, or rm is negative
-    LO_rn_neg = (~(rn_inv / tmp_rm) + i32(1)) if sign_rn else (~(rn / tmp_rm_inv) + i32(1))
+    LO_rn_neg = (~(rn_inv // tmp_rm) + i32(1)) if sign_rn else (~(rn // tmp_rm_inv) + i32(1))
     HI_rn_neg = (~(rn_inv % tmp_rm) + i32(1)) if sign_rn else (~(rn % tmp_rm_inv) + i32(1))
 
     # Results if both numbers are positive
-    LO_pos = rn / tmp_rm if are_both_pos else LO_rn_neg
+    LO_pos = rn // tmp_rm if are_both_pos else LO_rn_neg
     HI_pos = rn % tmp_rm if are_both_pos else HI_rn_neg
 
     # Results if both numbers are negative
-    LO_neg = rn_inv / tmp_rm_inv if are_both_neg else LO_pos
+    LO_neg = rn_inv // tmp_rm_inv if are_both_neg else LO_pos
     HI_neg = rn_inv % tmp_rm_inv if are_both_neg else HI_pos
 
     # Results if rm is equal to zero
@@ -954,7 +954,7 @@ def divu(rn, rm):
     # LO <- Rn / Rm, HI <- Rn % Rm (Unsigned)
 
     tmp_rm = rm if rm else i32(1)  # used to delay the arithmetic computations
-    LO = rn / tmp_rm if rm else LO
+    LO = rn // tmp_rm if rm else LO
     HI = rn % tmp_rm if rm else HI
 
     exception_flags = i32(0) if rm else i32(EXCEPT_DIV_BY_ZERO)