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| author | Camille Mougey <commial@gmail.com> | 2018-07-05 17:52:12 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-07-05 17:52:12 +0200 |
| commit | a3961b92c47a9cc47510601b57267822fcbdcbdf (patch) | |
| tree | ac39a9859983baff15d52533829d95ffa760f633 /miasm2/arch/mips32/ira.py | |
| parent | f5fd096d35a9b3811097c40f553c90d3036cc035 (diff) | |
| parent | 045182c94d6bb1c9417b612d88fd469e0f87872f (diff) | |
| download | miasm-a3961b92c47a9cc47510601b57267822fcbdcbdf.tar.gz miasm-a3961b92c47a9cc47510601b57267822fcbdcbdf.zip | |
Merge pull request #784 from serpilliere/split_ir_graph
Split ir graph
Diffstat (limited to 'miasm2/arch/mips32/ira.py')
| -rw-r--r-- | miasm2/arch/mips32/ira.py | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py index 53c2c6b3..3caa8b12 100644 --- a/miasm2/arch/mips32/ira.py +++ b/miasm2/arch/mips32/ira.py @@ -10,12 +10,8 @@ class ir_a_mips32l(ir_mips32l, ira): ir_mips32l.__init__(self, loc_db) self.ret_reg = self.arch.regs.V0 - def pre_add_instr(self, block, instr, assignments, ir_blocks_all, gen_pc_updt): - # Avoid adding side effects, already done in post_add_bloc - return False - - def post_add_block(self, block, ir_blocks): - IntermediateRepresentation.post_add_block(self, block, ir_blocks) + def post_add_asmblock_to_ircfg(self, block, ircfg, ir_blocks): + IntermediateRepresentation.post_add_asmblock_to_ircfg(self, block, ircfg, ir_blocks) new_irblocks = [] for irb in ir_blocks: pc_val = None |