Jitter: add mips32l jit

1 files changed, 37 insertions, 0 deletions

diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py
new file mode 100644
index 00000000..70e05380
--- /dev/null
+++ b/miasm2/arch/mips32/jit.py
@@ -0,0 +1,37 @@
+from miasm2.jitter.jitload import jitter
+from miasm2.core import asmbloc
+from miasm2.core.utils import *
+from miasm2.arch.mips32.sem import ir_mips32
+
+import logging
+
+log = logging.getLogger('jit_mips32')
+hnd = logging.StreamHandler()
+hnd.setFormatter(logging.Formatter("[%(levelname)s]: %(message)s"))
+log.addHandler(hnd)
+log.setLevel(logging.CRITICAL)
+
+class jitter_mips32(jitter):
+
+    def __init__(self, *args, **kwargs):
+        sp = asmbloc.asm_symbol_pool()
+        jitter.__init__(self, ir_mips32(sp), *args, **kwargs)
+        self.my_ir.jit_pc = self.my_ir.arch.regs.PC
+        self.my_ir.attrib = 'l'
+
+    def vm_push_uint32_t(self, v):
+        self.cpu.SP -= 4
+        self.vm.vm_set_mem(self.cpu.SP, pck32(v))
+
+    def vm_pop_uint32_t(self):
+        x = upck32(self.vm.vm_get_mem(self.cpu.SP, 4))
+        self.cpu.SP += 4
+        return x
+
+    def get_stack_arg(self, n):
+        x = upck32(self.vm.vm_get_mem(self.cpu.SP + 4 * n, 4))
+        return x
+
+    def init_run(self, *args, **kwargs):
+        jitter.init_run(self, *args, **kwargs)
+        self.cpu.PC = self.pc