diff options
| author | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-02-08 10:20:03 +0100 |
|---|---|---|
| committer | Fabrice Desclaux <fabrice.desclaux@cea.fr> | 2017-02-12 18:03:12 +0100 |
| commit | 527dc222b107e39e2da8d2d4b053db397df08fae (patch) | |
| tree | 1a565c192712c8b944944329698dee4939ee333e /miasm2/arch/x86/arch.py | |
| parent | ca275b0c0a4cdbfe0033758b61f9f1484f67e884 (diff) | |
| download | miasm-527dc222b107e39e2da8d2d4b053db397df08fae.tar.gz miasm-527dc222b107e39e2da8d2d4b053db397df08fae.zip | |
Expression: REPLACE IS_OP_SEGM
/!\ API MODIFICATION: is_op_segm becomes is_mem_segm is_op_segm: Returns True if is ExprOp and op == 'segm' is_mem_segm: Returns True if is ExprMem and ptr is_op_segm
Diffstat (limited to '')
| -rw-r--r-- | miasm2/arch/x86/arch.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py index edbe9874..20fdc1cf 100644 --- a/miasm2/arch/x86/arch.py +++ b/miasm2/arch/x86/arch.py @@ -596,7 +596,7 @@ class instruction_x86(instruction): prefix = "" sz = SIZE2MEMPREFIX[expr.size] segm = "" - if expr.is_op_segm(): + if expr.is_mem_segm(): segm = "%s:" % expr.arg.args[0] expr = expr.arg.args[1] else: @@ -1720,10 +1720,10 @@ SIZE2XMMREG = {64:gpregs_mm, def parse_mem(expr, parent, w8, sx=0, xmm=0, mm=0): dct_expr = {} opmode = parent.v_opmode() - if expr.is_op_segm() and isinstance(expr.arg.args[0], ExprInt): + if expr.is_mem_segm() and expr.arg.args[0].is_int(): return None, None, False - if expr.is_op_segm(): + if expr.is_mem_segm(): segm = expr.arg.args[0] ptr = expr.arg.args[1] else: |