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| author | Camille Mougey <commial@gmail.com> | 2017-02-13 09:41:39 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-02-13 09:41:39 +0100 |
| commit | 827c6cb8e1cdcc6e501c319353f89615b9cc09c9 (patch) | |
| tree | 248eef50d915fc3eb8fec634318f6492af6d0f27 /miasm2/arch/x86/arch.py | |
| parent | 1719580d49d297f8b9b647569372e3eff888fbdf (diff) | |
| parent | 4cadfcf63e4e74918f022d24c5efa56aafbaff12 (diff) | |
| download | miasm-827c6cb8e1cdcc6e501c319353f89615b9cc09c9.tar.gz miasm-827c6cb8e1cdcc6e501c319353f89615b9cc09c9.zip | |
Merge pull request #492 from serpilliere/fix_mem_accesses
Fix mem accesses
Diffstat (limited to 'miasm2/arch/x86/arch.py')
| -rw-r--r-- | miasm2/arch/x86/arch.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py index edbe9874..20fdc1cf 100644 --- a/miasm2/arch/x86/arch.py +++ b/miasm2/arch/x86/arch.py @@ -596,7 +596,7 @@ class instruction_x86(instruction): prefix = "" sz = SIZE2MEMPREFIX[expr.size] segm = "" - if expr.is_op_segm(): + if expr.is_mem_segm(): segm = "%s:" % expr.arg.args[0] expr = expr.arg.args[1] else: @@ -1720,10 +1720,10 @@ SIZE2XMMREG = {64:gpregs_mm, def parse_mem(expr, parent, w8, sx=0, xmm=0, mm=0): dct_expr = {} opmode = parent.v_opmode() - if expr.is_op_segm() and isinstance(expr.arg.args[0], ExprInt): + if expr.is_mem_segm() and expr.arg.args[0].is_int(): return None, None, False - if expr.is_op_segm(): + if expr.is_mem_segm(): segm = expr.arg.args[0] ptr = expr.arg.args[1] else: |