Merge pull request #497 from serpilliere/rename_symb

Rename symb

1 files changed, 14 insertions, 16 deletions

diff --git a/miasm2/arch/x86/ira.py b/miasm2/arch/x86/ira.py
index 31d38b37..74aa0203 100644
--- a/miasm2/arch/x86/ira.py
+++ b/miasm2/arch/x86/ira.py
@@ -1,9 +1,7 @@
 #-*- coding:utf-8 -*-
 
-from miasm2.expression.expression import ExprAff, ExprOp, ExprId
-from miasm2.core.graph import DiGraph
-from miasm2.core.asmbloc import expr_is_label
-from miasm2.ir.ir import ir, irbloc, AssignBlock
+from miasm2.expression.expression import ExprAff, ExprOp
+from miasm2.ir.ir import AssignBlock
 from miasm2.ir.analysis import ira
 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64
 
@@ -15,21 +13,21 @@ class ir_a_x86_16(ir_x86_16, ira):
         self.ret_reg = self.arch.regs.AX
 
     # for test XXX TODO
-    def set_dead_regs(self, b):
-        b.rw[-1][1].add(self.arch.regs.zf)
-        b.rw[-1][1].add(self.arch.regs.of)
-        b.rw[-1][1].add(self.arch.regs.pf)
-        b.rw[-1][1].add(self.arch.regs.cf)
-        b.rw[-1][1].add(self.arch.regs.nf)
-        b.rw[-1][1].add(self.arch.regs.af)
-
-    def get_out_regs(self, b):
+    def set_dead_regs(self, irblock):
+        irblock.rw[-1][1].add(self.arch.regs.zf)
+        irblock.rw[-1][1].add(self.arch.regs.of)
+        irblock.rw[-1][1].add(self.arch.regs.pf)
+        irblock.rw[-1][1].add(self.arch.regs.cf)
+        irblock.rw[-1][1].add(self.arch.regs.nf)
+        irblock.rw[-1][1].add(self.arch.regs.af)
+
+    def get_out_regs(self, _):
         return set([self.ret_reg, self.sp])
 
     def add_unused_regs(self):
-        leaves = [self.blocs[n] for n in self.g.leafs()]
-        for b in leaves:
-            self.set_dead_regs(b)
+        leaves = [self.blocks[label] for label in self.g.leafs()]
+        for irblock in leaves:
+            self.set_dead_regs(irblock)
 
 class ir_a_x86_32(ir_x86_32, ir_a_x86_16):