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| author | Camille Mougey <commial@gmail.com> | 2017-05-17 16:19:59 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-05-17 16:19:59 +0200 |
| commit | 146ac072ed22af2129cc3034d61cd07a083d4e74 (patch) | |
| tree | 84739b99c265ffd47cfa7701585b5f4845a60bc2 /miasm2/arch/x86/jit.py | |
| parent | d3e5587207f68763ea483c0deeef160b3ebec155 (diff) | |
| parent | 0b02c98199592fe148b35a06cb328c53f8a1dbe5 (diff) | |
| download | miasm-146ac072ed22af2129cc3034d61cd07a083d4e74.tar.gz miasm-146ac072ed22af2129cc3034d61cd07a083d4e74.zip | |
Merge pull request #558 from serpilliere/fix_x86_segm
Fix x86 segm
Diffstat (limited to 'miasm2/arch/x86/jit.py')
| -rw-r--r-- | miasm2/arch/x86/jit.py | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index 6d9be8ac..9ffd8a82 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -80,6 +80,15 @@ class jitter_x86_32(jitter): def ir_archbloc_fix_regs_for_mode(self, irblock, attrib=64): self.orig_irbloc_fix_regs_for_mode(irblock, 64) + def push_uint16_t(self, value): + self.cpu.ESP -= self.ir_arch.sp.size / 8 + self.vm.set_mem(self.cpu.ESP, pck16(value)) + + def pop_uint16_t(self): + value = upck16(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) + self.cpu.ESP += self.ir_arch.sp.size / 8 + return value + def push_uint32_t(self, value): self.cpu.ESP -= self.ir_arch.sp.size / 8 self.vm.set_mem(self.cpu.ESP, pck32(value)) |