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| author | Ajax <commial@gmail.com> | 2017-03-31 15:09:01 +0200 |
|---|---|---|
| committer | Ajax <commial@gmail.com> | 2017-04-06 13:47:38 +0200 |
| commit | 620c96e891d0ad356332713a23b39b9d2382470c (patch) | |
| tree | 7ce86a2fcc502800a4c426a43cb362e17ed80002 /miasm2/arch/x86/jit.py | |
| parent | b1ed94019554b25d4d8924594f8868318e8a8c4a (diff) | |
| download | miasm-620c96e891d0ad356332713a23b39b9d2382470c.tar.gz miasm-620c96e891d0ad356332713a23b39b9d2382470c.zip | |
Introduce a naive "System V" calling convention
Diffstat (limited to 'miasm2/arch/x86/jit.py')
| -rw-r--r-- | miasm2/arch/x86/jit.py | 59 |
1 files changed, 38 insertions, 21 deletions
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index cfdabf8c..4f50315f 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -92,6 +92,10 @@ class jitter_x86_32(jitter): def get_stack_arg(self, index): return upck32(self.vm.get_mem(self.cpu.ESP + 4 * index, 4)) + def init_run(self, *args, **kwargs): + jitter.init_run(self, *args, **kwargs) + self.cpu.EIP = self.pc + # calling conventions # stdcall @@ -108,6 +112,8 @@ class jitter_x86_32(jitter): if ret_value2 is not None: self.cpu.EDX = ret_value2 + get_arg_n_stdcall = get_stack_arg + # cdecl @named_arguments def func_args_cdecl(self, n_args): @@ -115,18 +121,23 @@ class jitter_x86_32(jitter): args = [self.get_stack_arg(i) for i in xrange(n_args)] return ret_ad, args - def func_ret_cdecl(self, ret_addr, ret_value): + def func_ret_cdecl(self, ret_addr, ret_value=None): self.cpu.EIP = ret_addr - self.cpu.EAX = ret_value + if ret_value is not None: + self.cpu.EAX = ret_value - def init_run(self, *args, **kwargs): - jitter.init_run(self, *args, **kwargs) - self.cpu.EIP = self.pc + get_arg_n_cdecl = get_stack_arg + + # System V + func_args_systemv = func_args_cdecl + func_ret_systemv = func_ret_cdecl + get_arg_n_systemv = get_stack_arg class jitter_x86_64(jitter): C_Gen = x86_64_CGen + args_regs_systemv = ['RDI', 'RSI', 'RDX', 'RCX', 'R8', 'R9'] def __init__(self, *args, **kwargs): sp = asmblock.AsmSymbolPool() @@ -152,6 +163,13 @@ class jitter_x86_64(jitter): def get_stack_arg(self, index): return upck64(self.vm.get_mem(self.cpu.RSP + 8 * index, 8)) + def init_run(self, *args, **kwargs): + jitter.init_run(self, *args, **kwargs) + self.cpu.RIP = self.pc + + # calling conventions + + # stdcall @named_arguments def func_args_stdcall(self, n_args): args_regs = ['RCX', 'RDX', 'R8', 'R9'] @@ -169,23 +187,22 @@ class jitter_x86_64(jitter): self.cpu.RAX = ret_value return True + # cdecl + func_args_cdecl = func_args_stdcall + func_ret_cdecl = func_ret_stdcall + + # System V + + def get_arg_n_systemv(self, index): + args_regs = self.args_regs_systemv + if index < len(args_regs): + return getattr(self.cpu, args_regs[index]) + return self.get_stack_arg(index - len(args_regs)) + @named_arguments - def func_args_cdecl(self, n_args): - args_regs = ['RCX', 'RDX', 'R8', 'R9'] + def func_args_systemv(self, n_args): ret_ad = self.pop_uint64_t() - args = [] - for i in xrange(min(n_args, 4)): - args.append(self.cpu.get_gpreg()[args_regs[i]]) - for i in xrange(max(0, n_args - 4)): - args.append(self.get_stack_arg(i)) + args = [self.get_arg_n_systemv(index) for index in xrange(n_args)] return ret_ad, args - def func_ret_cdecl(self, ret_addr, ret_value=None): - self.pc = self.cpu.RIP = ret_addr - if ret_value is not None: - self.cpu.RAX = ret_value - return True - - def init_run(self, *args, **kwargs): - jitter.init_run(self, *args, **kwargs) - self.cpu.RIP = self.pc + func_ret_systemv = func_ret_cdecl |